MC9S12C128VFU Freescale Semiconductor, MC9S12C128VFU Datasheet - Page 316

• Manufacturer Part Number: MC9S12C128VFU
• Manufacturer: Freescale Semiconductor

Specifications of MC9S12C128VFU

• Cpu Family: HCS12
• Device Core Size: 16b
• Frequency (max): 25MHz
• Interface Type: CAN/SCI/SPI
• Program Memory Type: Flash
• Program Memory Size: 128KB
• Total Internal Ram Size: 4KB
• # I/os (max): 60
• Number Of Timers - General Purpose: 8
• Operating Supply Voltage (typ): 2.5/5V
• Operating Supply Voltage (max): 2.75/5.5V
• Operating Supply Voltage (min): 2.35/2.97V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 105C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 80
• Package Type: PQFP
• Lead Free Status / Rohs Status: Not Compliant

Chapter 10 Freescale’s Scalable Controller Area Network (S12MSCANV2)
Write: For transmit buffers, anytime when TXEx flag is set (see
Flag Register
Section 10.3.2.11, “MSCAN Transmit Buffer Selection Register
receive buffers.
Reset: Undefined (0x00XX) because of RAM-based implementation
10.3.3.1
The identifier registers for an extended format identifier consist of a total of 32 bits; ID[28:0], SRR, IDE,
and RTR bits. The identifier registers for a standard format identifier consist of a total of 13 bits; ID[10:0],
RTR, and IDE bits.
10.3.3.1.1
316
Module Base + 0x00X1
ID[28:21]
Register
0x00X0
0x00X1
0x00X2
0x00X3
Field
Name
IDR0
IDR1
IDR2
IDR3
7:0
Reset:
W
R
Extended Format Identifier — The identifiers consist of 29 bits (ID[28:0]) for the extended format. ID28 is the
most significant bit and is transmitted first on the CAN bus during the arbitration procedure. The priority of an
identifier is defined to be highest for the smallest binary number.
Identifier Registers (IDR0–IDR3)
Figure 10-24. Receive/Transmit Message Buffer — Standard Identifier Mapping
(CANTFLG)”) and the corresponding transmit buffer is selected in CANTBSEL (see
W
W
W
W
R
R
R
R
IDR0–IDR3 for Extended Identifier Mapping
ID28
7
x
Figure 10-25. Identifier Register 0 (IDR0) — Extended Identifier Mapping
Bit 7
ID10
ID2
Table 10-24. IDR0 Register Field Descriptions — Extended
ID27
= Unused, always read ‘x’
6
x
ID9
ID1
6
MC9S12C-Family / MC9S12GC-Family
ID26
5
x
ID8
ID0
5
Rev 01.24
ID25
4
x
Description
RTR
ID7
4
ID24
IDE (=0)
x
3
Section 10.3.2.7, “MSCAN Transmitter
(CANTBSEL)”). Unimplemented for
ID6
3
ID23
2
x
ID5
2
Freescale Semiconductor
ID22
ID4
x
1
1
ID21
Bit 0
ID3
0
x