MC9S12C128VFU Freescale Semiconductor, MC9S12C128VFU Datasheet - Page 367

• Manufacturer Part Number: MC9S12C128VFU
• Manufacturer: Freescale Semiconductor

Specifications of MC9S12C128VFU

• Cpu Family: HCS12
• Device Core Size: 16b
• Frequency (max): 25MHz
• Interface Type: CAN/SCI/SPI
• Program Memory Type: Flash
• Program Memory Size: 128KB
• Total Internal Ram Size: 4KB
• # I/os (max): 60
• Number Of Timers - General Purpose: 8
• Operating Supply Voltage (typ): 2.5/5V
• Operating Supply Voltage (max): 2.75/5.5V
• Operating Supply Voltage (min): 2.35/2.97V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 105C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 80
• Package Type: PQFP
• Lead Free Status / Rohs Status: Not Compliant

Read: anytime
Write: anytime
12.3.2.14 PWM Channel Duty Registers (PWMDTYx)
There is a dedicated duty register for each channel. The value in this register determines the duty of the
associated PWM channel. The duty value is compared to the counter and if it is equal to the counter value
a match occurs and the output changes state.
The duty registers for each channel are double buffered so that if they change while the channel is enabled,
the change will NOT take effect until one of the following occurs:
In this way, the output of the PWM will always be either the old duty waveform or the new duty waveform,
not some variation in between. If the channel is not enabled, then writes to the duty register will go directly
to the latches as well as the buffer.
Freescale Semiconductor
Module Base + 0x0015
Module Base + 0x0016
Module Base + 0x0017
Reset
Reset
Reset
•
•
•
W
W
W
R
R
R
The effective period ends
The counter is written (counter resets to 0x0000)
The channel is disabled
Bit 7
Bit 7
Bit 7
0
0
0
7
7
7
Figure 12-24. PWM Channel Period Registers (PWMPER3)
Figure 12-25. PWM Channel Period Registers (PWMPER4)
Figure 12-26. PWM Channel Period Registers (PWMPER5)
6
0
6
0
6
0
6
6
6
MC9S12C-Family / MC9S12GC-Family
5
0
5
0
5
0
5
5
5
Rev 01.24
4
0
4
0
4
0
4
4
4
Chapter 12 Pulse-Width Modulator (PWM8B6CV1) Block Description
3
0
3
0
3
0
3
3
3
2
0
2
0
2
0
2
2
2
1
0
1
0
1
0
1
1
1
Bit 0
Bit 0
Bit 0
0
0
0
0
0
0
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