MC9S12C128VFU Freescale Semiconductor, MC9S12C128VFU Datasheet - Page 259
MC9S12C128VFU
Manufacturer Part Number
MC9S12C128VFU
Description
Manufacturer
Freescale Semiconductor
Datasheet
1.MC9S12C128VFU.pdf
(690 pages)
Specifications of MC9S12C128VFU
Cpu Family
HCS12
Device Core Size
16b
Frequency (max)
25MHz
Interface Type
CAN/SCI/SPI
Program Memory Type
Flash
Program Memory Size
128KB
Total Internal Ram Size
4KB
# I/os (max)
60
Number Of Timers - General Purpose
8
Operating Supply Voltage (typ)
2.5/5V
Operating Supply Voltage (max)
2.75/5.5V
Operating Supply Voltage (min)
2.35/2.97V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 105C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
80
Package Type
PQFP
Lead Free Status / Rohs Status
Not Compliant
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9.3.2.5
This register enables CRG interrupt requests.
Read: anytime
Write: anytime
Freescale Semiconductor
Module Base + 0x0004
LOCKIE
SCMIE
SCMIF
Reset
Field
Field
SCM
RTIE
1
0
7
4
1
W
R
RTIE
Self-Clock Mode Interrupt Flag — SCMIF is set to 1 when SCM status bit changes. This flag can only be
cleared by writing a 1. Writing a 0 has no effect. If enabled (SCMIE=1), SCMIF causes an interrupt request.
0 No change in SCM bit.
1 SCM bit has changed.
Self-Clock Mode Status Bit — SCM reflects the current clocking mode. Writes have no effect.
0 MCU is operating normally with OSCCLK available.
1 MCU is operating in self-clock mode with OSCCLK in an unknown state. All clocks are derived from PLLCLK
Real-Time Interrupt Enable Bit
0 Interrupt requests from RTI are disabled.
1 Interrupt will be requested whenever RTIF is set.
Lock Interrupt Enable Bit
0 LOCK interrupt requests are disabled.
1 Interrupt will be requested whenever LOCKIF is set.
Self-Clock Mode Interrupt Enable Bit
0 SCM interrupt requests are disabled.
1 Interrupt will be requested whenever SCMIF is set.
CRG Interrupt Enable Register (CRGINT)
0
7
running at its minimum frequency f
= Unimplemented or Reserved
0
0
6
Figure 9-8. CRG Interrupt Enable Register (CRGINT)
Table 9-2. CRGFLG Field Descriptions (continued)
Table 9-3. CRGINT Field Descriptions
MC9S12C-Family / MC9S12GC-Family
0
0
5
SCM
.
LOCKIE
Rev 01.24
0
4
Chapter 9 Clocks and Reset Generator (CRGV4) Block Description
Description
Description
0
0
3
0
0
2
SCMIE
0
1
0
0
0
259
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