SAA7146AH/V4,557 NXP Semiconductors, SAA7146AH/V4,557 Datasheet - Page 104

IC VIDEO SPCI BRIDGE HP 160-QFP

SAA7146AH/V4,557

Manufacturer Part Number
SAA7146AH/V4,557
Description
IC VIDEO SPCI BRIDGE HP 160-QFP
Manufacturer
NXP Semiconductors
Type
Video Bridger
Datasheet

Specifications of SAA7146AH/V4,557

Package / Case
160-QFP
Applications
DTV
Mounting Type
Surface Mount
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
568-1318
935269343557
SAA7146AHBB

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
SAA7146AH/V4,557
Manufacturer:
NXP Semiconductors
Quantity:
10 000
Philips Semiconductors
7.15.4.4
To configure and initiate a transfer there are 3 PCI memory mapped command words. A DEBI register upload after
writing to DEBI_COMMAND starts the transfer process.
Table 95 DEBI_CONFIG
Table 96 DEBI_COMMAND
Table 97 DEBI_PAGE
Table 98 DEBI_AD
2004 Aug 25
7CH
80H
84H
88H
OFFSET
OFFSET
OFFSET
OFFSET
Multimedia bridge, high performance
Scaler and PCI circuit (SPCI)
Command word description
XIRQ_EN
XRESUME
FAST
TIMEOUT [3:0]
SWAP
SLAVE16
INCREMENT
INTEL
TIEN
BLOCKLENGTH
[14:0]
WRITE_N
A16_IN
DEBI_PAGE
PAGE_EN
DEBI_AD
NAME
NAME
NAME
NAME
31
30
29
28
27 and 26
25 to 22
21 and 20 RW
19
18
17
16
15 to 0
31 to 17
16
15 to 0
31 to 12
11
10 to 0
31 to 0
BIT
BIT
BIT
BIT
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
TYPE
TYPE
TYPE
TYPE
enable external interrupt on GPIO3
resume block transfer when XIRQ was de-asserted
reserved
enable fast mode (short t
reserved
timer set-up value (PCI clock cycles)
endian swap type:
indicates that slave is able to serve 16-bit cycles
enables address increment for block transfer
Intel style bus handshake if HIGH, else Motorola style
timer enable (active LOW)
reserved
BLOCKLENGTH > 4: block transfer length in bytes
4
BLOCKLENGTH = 0: reserved
transfer direction (write if LOW)
slave target start address
DEBI page table address (not used if PAGE_EN = 0)
enable address paging
reserved
data input/output in immediate mode or DMA start address
for block transfer (Dword aligned, DEBI_AD [1:0] have to be
set to logic 0)
104
00: straight - don’t swap
01: 2-byte swap
10: 4-byte swap
11: reserved
BLOCKLENGTH > 0: immediate transfer 1 to 4 bytes
DESCRIPTION
DESCRIPTION
DESCRIPTION
DESCRIPTION
rwi
time)
Product specification
SAA7146A

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