SAA7146AH/V4,557 NXP Semiconductors, SAA7146AH/V4,557 Datasheet - Page 69

• Manufacturer Part Number: SAA7146AH/V4,557
• Description: IC VIDEO SPCI BRIDGE HP 160-QFP
• Manufacturer: NXP Semiconductors
• Type: Video Bridger

Specifications of SAA7146AH/V4,557

• Package / Case: 160-QFP
• Applications: DTV
• Mounting Type: Surface Mount
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 568-1318; 935269343557; SAA7146AHBB

Philips Semiconductors
7.9.2.6
To preserve the signal quality for slight vertical
downscales (scaling factors 1 to
Interpolation (LPI) between consecutive lines is
implemented to generate geometrically correct vertical
output lines. Thus, the new geometric position between
lines N and N + 1 can be calculated.
A new output line is calculated by weighting the samples
‘p’ of lines N and N + 1 with the normalized distance to the
newly calculated position:
p(M) = A
With N
Input Lines the scaler register bits YSCI (scaling
increment) and YP (scaling start phase) have to be set
according to the following equations:
2004 Aug 25
handbook, halfpage
1
(964)
...
1
(980)
VERTICAL
17
23
YSCI = INT [1024
YPx = INT [
value).
Multimedia bridge, high performance
Scaler and PCI circuit (SPCI)
SCALE
RATIO
to
to
new calculated position line
of output line M
OL
1
1
18
24
= Number of Output Lines and N
LPI mode (scaling factor range 1 to
bit YACM = 0)
p(N + 1) + (1
Fig.21 Calculation of output lines.
YSCI
16
...
22
YACL
16
input lines
] scaling start phase (recommended
(N
1111 1111 1 1 1111 1111
2212 2212 2 2 2122 2122
1222 2222 1 1 2222 2221
...
1111 2222 1111
1111 2222 1111
1121 1212 1121
1211 2121 1211
IL
SEQUENCE (EXAMPLE)
A)
/(N
OL
N
I
I
COEFFICIENT
p(N); where A = 0 to
1
Distance = 1
2
1)] scaling increment
) Linear Phase
A
M
IL
(1
= Number of
MHB107
N
A)
1
I
I
2
1
; register
63
FF, 00
44, BB
01, FE
...
0F, F0
AD, 52
64
.
CYA; CYB
69
The vertical start phase offset is defined by
YP
Finally 3 special modes are to be emphasized:
1. Bypass (YSCI = 0, YP = 64); each line
2. Low-pass (YSCI = 0, YP < 64); e.g. YP = 32: average
3. For processing of interlaced input signals the LPI
In modes 1 and 2 the first input line is fed to the output
(without processing), so that the number of output lines
equals the number of input lines.
7.9.2.7
For both vertical scaling modes there is a flip option
‘mirroring’ available for input lines with a maximum of
384 pixels. In the case of full screen pictures (e.g.
768
downscaled to 384 pixel/line in the horizontal prescaling
unit and after vertical processing (flipping) they may be
rezoomed to the original 768 pixels/line in the following
VPD.
It should be noted that, when using the flip option, the last
input line can not be displayed at the output.
YP = 0: offset = 0 geometrical position of 1st
line
YP = 64: offset =
1st line
64
to corresponding line
value of 2 lines (1 + z
mode must be used (ACCU mode would cause ‘line
pairing’ problems). The scaling start phase for odd and
even field have to be set to:
YP
(YP = 0 to 64):
out
576) that have to be flipped, they first have to be
even
= 1st line
out
Flip option (Mirror = 1)
=
= 2nd line
3
18
32
32
...
32
32
WEIGHT
2
SUM
in
YP
64
odd
64
in
.
= 1 geometrical position of
(line 1 = odd)
in
3
4
4
...
4
4
h
DCGY
filter)
16
1
1
...
1
1
Product specification
(CONTR. | SAT.)
SAA7146A
18
= X/Y
out
BCS
is equivalent
64