SAA7146AH/V4,557 NXP Semiconductors, SAA7146AH/V4,557 Datasheet - Page 75
![IC VIDEO SPCI BRIDGE HP 160-QFP](/photos/6/89/68971/568-160-qfp_sot322-2_sml.jpg)
SAA7146AH/V4,557
Manufacturer Part Number
SAA7146AH/V4,557
Description
IC VIDEO SPCI BRIDGE HP 160-QFP
Manufacturer
NXP Semiconductors
Type
Video Bridger
Datasheet
1.SAA7146AHV4557.pdf
(139 pages)
Specifications of SAA7146AH/V4,557
Package / Case
160-QFP
Applications
DTV
Mounting Type
Surface Mount
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
568-1318
935269343557
SAA7146AHBB
935269343557
SAA7146AHBB
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
SAA7146AH/V4,557
Manufacturer:
NXP Semiconductors
Quantity:
10 000
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Philips Semiconductors
Table 59
Table 60 RGB-24 packed format
The following formats use two pixels per Dword and derive
RGB from RGB-24 by truncation or by error diffusion
dither. The byte phase of the first sample each line is
defined by LSB + 1 of DMA base. ‘ ’ is the colour key.
Table 61 RGB-16 formats Dword
2004 Aug 25
1
2
3
Pixel
/
/
RGB-16 (5 : 6 : 5): Red has 5 bits, Green has 6 bits,
Blue has 5 bits
RGB-15 ( : 5 : 5 : 5): -bit, Red has 5 bits, Green has
5 bits, Blue has 5 bits
RGB-15 (5 : 5 :
Multimedia bridge, high performance
Scaler and PCI circuit (SPCI)
bit, Blue has 5 bits.
BUS CYCLE
BIT 31 TO BIT 16
1
BIT 31 TO BIT 24
RGB-32 format
PACKING WITHIN 32-BIT Dword
: 5): Red has 5 bits, Green has 5 bits,
B
G
R
1
3
2
BIT 31 TO BIT 24
Pixel
R
V
0
BIT 15 TO BIT 0
BIT 23 TO BIT 16
PACKING WITHIN 32-BIT Dword
R
B
G
2
0
3
BIT 23 TO BIT 16
PACKING WITHIN 32-BIT Dword
75
G
Y
7.11.1.2
All YUV formats are based on CCIR coding:
Luminance Y in straight binary:
Colour difference signals UV in offset binary:
Black: Y = 16 of 256 linear coding
White: Y = 235 of 256 linear coding.
No colour: U = V = 128 of 256 steps
Full colour: U = V = 128 112 steps.
YUV 4 : 2 : 2: U and V sampled co-sided with first
Y sample (of 2 samples in-line). Byte phase of the first
sample each line is defined by bit 0 and bit 1 of DMA
base address (see Table 62).
YUV 4 : 1 : 1: U and V sampled co-sided with first
Y sample, (of 4 samples in-line), 8 samples are packed
in 3 Dwords (see Table 63).
BIT 15 TO BIT 8
G
R
B
YUV
3
1
0
BIT 15 TO BIT 8
B
U
B
G
R
BIT 7 TO BIT 0
0
2
1
Product specification
BIT 7 TO BIT 0
SAA7146A
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