SAA7146AH/V4,557 NXP Semiconductors, SAA7146AH/V4,557 Datasheet - Page 16

• Manufacturer Part Number: SAA7146AH/V4,557
• Description: IC VIDEO SPCI BRIDGE HP 160-QFP
• Manufacturer: NXP Semiconductors
• Type: Video Bridger

Specifications of SAA7146AH/V4,557

• Package / Case: 160-QFP
• Applications: DTV
• Mounting Type: Surface Mount
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 568-1318; 935269343557; SAA7146AHBB

Philips Semiconductors
Table 3 Video DMA control registers
2004 Aug 25
OFFSET
00
04
08
0C
10
14
18
1C
20
24
28
(HEX)
Multimedia bridge, high performance
Scaler and PCI circuit (SPCI)
BaseOdd1
BaseEven1 31 to 0
ProtAddr1
Pitch1
Page1
ME1
Limit1
PV1
Swap1
NumLines1 27 to 16 RW
NumBytes1 11 to 0
BaseOdd2
BaseEven2 31 to 0
ProtAddr2
Pitch2
Page2
ME2
Limit2
PV2
NAME
31 to 0
31 to 2
1 and 0
31 to 0
31 to 12 RW
11
10 to 8
7 to 4
3
2
1 and 0
31 to 0
31 to 2
1 and 0
31 to 0
31 to 12 RW
11
10 to 8
7 to 4
3
BIT
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
TYPE
PCI base address for odd fields of the upper (or lower if pitch is
negative) left pixel of the transferred field
PCI base address for even fields of the upper (or lower if pitch is
negative) left pixel of the transferred field
protection address
reserved
distance between the start addresses of two consecutive lines of a single
field
base address of the page table (see Section 7.2.4)
mapping enable; this bit enables the MMU
reserved
interrupt limit; defines the size of the memory range, that raise an
interrupt, if its boundaries are passed
protection violation handling
reserved
endian swapping of all Dwords passing the FIFO 1:
Number of lines per field; it defines the number of qualified lines to be
processed by the HPS per field. This will cut off all the following input lines
at the HPS input.
Number of pixels per line; it defines the number of qualified pixels to be
processed by the HPS per line. This will cut off all the following pixels at
the HPS input.
PCI base address for odd fields of the upper (or lower if top-down flip is
selected) left pixel of the transferred field
PCI base address for even fields of the upper (or lower if top-down flip is
selected) left pixel of the transferred field
protection address
reserved
distance between the start addresses of two consecutive lines of a field
base address of the page table (see Section 7.2.4)
mapping enable; this bit enables the MMU
reserved
interrupt limit; defines the size of the memory range, that raise an
interrupt, if its boundaries are passed
protection violation handling
00 = no swap
01 = 2-byte swap (3210 to 2301)
10 = 4-byte swap (3210 to 0123)
11 = reserved
16
DESCRIPTION
Product specification
SAA7146A