mt47h64m8b6-5e-it Micron Semiconductor Products, mt47h64m8b6-5e-it Datasheet - Page 41

• Manufacturer Part Number: mt47h64m8b6-5e-it
• Description: 512mb X4, X8, X16 Ddr2 Sdram
• Manufacturer: Micron Semiconductor Products

Table 16:
Figure 16:
PDF: 09005aef82f1e6e2/Source: 09005aef821aed36
DDR2_x4x8x16_Core2.fm - 512Mb DDR2: Rev. L; Core DDR2: Rev. C 4/08 EN
Parameter
DC input signal voltage
DC differential input voltage
AC differential input voltage
AC differential cross-point voltage
Input midpoint voltage
Differential Input Logic Levels
All voltages referenced to V
Differential Input Signal Levels
Notes:
Notes:
1. V
2. V
3. V
4. The typical value of V
5. V
6. V
1. TR and CP may not be more positive than V
2. TR represents the CK, DQS, RDQS, LDQS, and UDQS signals; CP represents CK#, DQS#,
3. This provides a minimum of 850mV to a maximum of 950mV and is expected to be V
4. TR and CP must cross in this region.
5. TR and CP must meet at least V
6. TR and CP must have a minimum 500mV peak-to-peak swing.
7. Numbers in diagram reflect nominal values (V
V
DD
Q = 1.8V
CK#, DQS, DQS#, LDQS, LDQS#, UDQS, UDQS#, and RDQS, RDQS#.
is the true input (such as CK, DQS, LDQS, UDQS) level and V
(such as CK#, DQS#, LDQS#, UDQS#) level. The minimum value is equal to V
Differential input signal levels are shown in Figure 16.
is the true input (such as CK, DQS, LDQS, UDQS, RDQS) level and V
input (such as CK#, DQS#, LDQS#, UDQS#, RDQS#) level. The minimum value is equal to
V
and V
differential input signals must cross, as shown in Figure 16.
the true input (CK, DQS) level and V
expected to be approximately 0.5 × V
RDQS#, LDQS#, and UDQS# signals.
1.075V
0.725V
–0.30V
IN
ID
ID
IH
MP
DD
2.1V
0.9V
CP 2
TR 2
(
(
(
(
DC
DC
AC
AC
Q + 300mV allowed provided 1.9V is not exceeded.
(
DC
IX
) specifies the allowable DC execution of each input of differential pair such as CK,
) specifies the input differential voltage |V
) specifies the input differential voltage |V
) - V
) specifies the input differential common mode voltage (V
(
AC
IL
SS
) is expected to track variations in V
Symbol
V
Input Electrical Characteristics and Operating Conditions
V
V
V
(
V
AC
MP
X
IN
ID
ID
IX
(
), as shown in Table 15 on page 39.
(
(
(
(
DC
DC
AC
AC
DC
)
)
)
)
)
IX
0.50 × V
(
AC
) is expected to be about 0.5 × V
41
–300
Min
250
500
850
DD
ID
(
Q - 175
DC
) MIN when static and is centered around V
CP
DD
is the complementary input (CK#, DQS#). V
Micron Technology, Inc., reserves the right to change products or specifications without notice.
Q.
DD
0.50 × V
X
512Mb: x4, x8, x16 DDR2 SDRAM
Q + 0.3V or more negative than V
DD
DD
TR
TR
Q = 1.8V).
Q. V
V
V
V
Max
- V
- V
950
DD
DD
DD
DD
IX
CP
CP
Q
Q
Q
Q + 175
(
AC
| required for switching, where V
| required for switching, where V
) indicates the voltage at which
DD
CP
Q of the transmitting device
is the complementary input
©2004 Micron Technology, Inc. All rights reserved.
TR
CP
V
V
V
+ V
IN
MP
IN
(
(
is the complementary
DC
(
DC
Units
DC
) MAX 1
) MIN 1
mV
mV
mV
mV
mV
) 3
CP
V
)/2 where V
IX
(
AC
IH
) 4
(
DC
V
MP
) - V
SS
ID
(
DC
MP
(
- 0.3V.
) 5
DC
Notes
IL
1, 6
2, 6
3, 6
(
TR
DD
V
DC
).
(
4
5
ID
DC
(
AC
is
) is
Q/2.
) 6
).
TR
TR