mt47h64m8b6-5e-it Micron Semiconductor Products, mt47h64m8b6-5e-it Datasheet - Page 74

• Manufacturer Part Number: mt47h64m8b6-5e-it
• Description: 512mb X4, X8, X16 Ddr2 Sdram
• Manufacturer: Micron Semiconductor Products

Figure 39:
Burst Type
PDF: 09005aef82f1e6e2/Source: 09005aef821aed36
DDR2_x4x8x16_Core2.fm - 512Mb DDR2: Rev. L; Core DDR2: Rev. C 4/08 EN
Mode Register (MR) Definition
Notes:
1. M16 (BA2) is only applicable for densities >1Gb, reserved for future use, and must be pro-
2. Mode bits (Mn) with corresponding address balls (An) greater than M12 (A12) are reserved
3. Not all listed WR and CL options are supported in any individual speed grade.
Accesses within a given burst may be programmed to be either sequential or interleaved.
The burst type is selected via bit M3, as shown in Figure 39. The ordering of accesses
within a burst is determined by the burst length, the burst type, and the starting column
address, as shown in Table 40 on page 75. DDR2 SDRAM supports 4-bit burst mode and
8-bit burst mode only. For 8-bit burst mode, full interleaved address ordering is
supported; however, sequential address ordering is nibble-based.
BA2
0
16
grammed to “0.”
for future use and must be programmed to “0.”
1
M15
BA1
15
MR
0
0
1
1
14
BA0
M12
M14
0
1
0
1
0
1
0
M11
n
An
0
0
0
0
1
1
1
1
(low power)
PD Mode
Extended mode register (EMR2)
Extended mode register (EMR3)
Slow exit
2
PD
(normal)
Fast exit
Extended mode register (EMR)
12
A12 A11
M10
Mode Register Definition
0
0
1
1
0
0
1
1
11
Mode register (MR)
M9
0
1
0
1
0
1
0
1
WR
10
A10
Write Recovery
9
Reserved
A9
M8
DLL TM
0
1
2
3
4
5
6
7
8
8
A8
DLL Reset
M7
0
1
7
A7 A6 A5 A4 A3
Yes
No
CAS#
Normal
Mode
74
6
Test
Latency
5
M6
0
0
0
0
1
1
1
1
4
M5
BT
0
0
1
1
0
0
1
1
3
M3
Micron Technology, Inc., reserves the right to change products or specifications without notice.
0
1
M4
Burst Length
0
1
0
1
0
1
0
1
2
A2 A1 A0
M2
0
0
0
0
1
1
1
1
1
M1
512Mb: x4, x8, x16 DDR2 SDRAM
CAS Latency (CL)
0
0
1
1
0
0
1
1
Interleaved
Burst Type
Sequential
0
M0
0
1
0
1
0
1
0
1
Reserved
Reserved
Reserved
Burst Length
3
4
5
6
7
Address Bus
Mode Register (Mx)
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
4
8
©2004 Micron Technology, Inc. All rights reserved.
Operations