mt47h64m8b6-5e-it Micron Semiconductor Products, mt47h64m8b6-5e-it Datasheet - Page 51

• Manufacturer Part Number: mt47h64m8b6-5e-it
• Description: 512mb X4, X8, X16 Ddr2 Sdram
• Manufacturer: Micron Semiconductor Products

Input Slew Rate Derating
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DDR2_x4x8x16_Core2.fm - 512Mb DDR2: Rev. L; Core DDR2: Rev. C 4/08 EN
For all input signals, the total
by adding the data sheet
value, respectively. Example:
t
crossing of V
for a falling signal is defined as the slew rate between the last crossing of V
the first crossing of V
If the actual signal is always earlier than the nominal slew rate line between shaded
“V
page 53).
If the actual signal is later than the nominal slew rate line anywhere between the shaded
“V
level to DC level is used for the derating value (see Figure 27 on page 53).
t
crossing of V
falling signal, is defined as the slew rate between the last crossing of V
the first crossing of V
If the actual signal is always later than the nominal slew rate line between shaded “DC to
V
If the actual signal is earlier than the nominal slew rate line anywhere between shaded
“DC to V
level to V
Although the total setup time might be negative for slow slew rates (a valid input signal
will not have reached V
input signal is still required to complete the transition and reach V
For slew rates in between the values listed in Tables 28 and 29 on page 52, the derating
values may obtained by linear interpolation.
IS, the nominal slew rate for a rising signal, is defined as the slew rate between the last
IH, the nominal slew rate for a rising signal, is defined as the slew rate between the last
REF
REF
REF
(
DC
(
(
DC
DC
) region,” use the nominal slew rate for the derating value (Figure 28 on page 54).
REF
) to AC region,” use the nominal slew rate for the derating value (Figure 26 on
) to AC region,” the slew rate of a tangent line to the actual signal from the AC
REF
(
(
DC
REF
IL
DC
(
DC
) region,” the slew rate of a tangent line to the actual signal from the DC
) level is used for the derating value (Figure 29 on page 54).
(
DC
) MAX and the first crossing of V
) and the first crossing of V
REF
IL
(
IH
AC
(
DC
t
[
IS (base) and
) MAX.
AC
).
]/V
t
t
51
IS (total setup time) =
IS (setup time) and
IL
[
AC
] at the time of the rising clock transition), a valid
Micron Technology, Inc., reserves the right to change products or specifications without notice.
t
IH (base) value to the Δ
512Mb: x4, x8, x16 DDR2 SDRAM
IH
(
AC
REF
t
IH (hold time) required is calculated
) MIN. Setup nominal slew rate (
t
IS (base) + Δ
(
DC
Input Slew Rate Derating
).
t
IH, nominal slew rate for a
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t
IS and Δ
t
IS.
IH
(
AC
IH
)/V
(
t
IH derating
DC
REF
IL
) MIN and
(
(
AC
DC
).
) and
t
IS)