mt47h64m16hw-3 Micron Semiconductor Products, mt47h64m16hw-3 Datasheet - Page 17

• Manufacturer Part Number: mt47h64m16hw-3
• Description: 1gb X4, X8, X16 Ddr2 Sdram
• Manufacturer: Micron Semiconductor Products

Table 4:
PDF: 09005aef821ae8bf/Source: 09005aef821aed36
1Gb_DDR2_x4x8x16_D2.fm - 1Gb DDR2: Rev. N; Core DDR2: Rev. C 4/08 EN
K8, K2, L7, L3,
D9, F1, F3, F7,
L1, L9, J1, J9,
D1, H1, M9,
D3, H3, M3,
G3, G1, G9,
F9, H9, K1,
F8, F2, G7,
K3, K7, K9
Number
x16 Ball
N7, P7,
R9, V1
T1, U9
E1, E9
M1
M2
M7
E7,
N9
N3
J7,
H8
D8
–
–
–
–
92-Ball – x4, x8, x16 Descriptions (continued)
K8, K2, L7, L3,
K8, K2, L7, L3
L1, L9, J1, J9
D1, H1, M9,
D3, H3, M3,
x4, x8 Ball
D9, H9, K1,
K3, K7, K9
Number
N7, P7,
R9, V1
T1, U9
J7, H8
J3, H2
M1
M2
M7
N9
N3
–
–
–
RDQS, RDQS# Output Redundant data strobe: For x8 only. RDQS is enabled/disabled
DQ11–DQ13,
RAS#, CAS#,
DQ14–DQ15
DQ8–DQ10,
DQS, DQS#
DQ0–DQ3,
DQ4–DQ7,
DQ0–DQ3,
DQ4–DQ7
DQ0–DQ3
Symbol
UDQS#
LDQS#
UDQS,
LDQS,
V
V
V
ODT
WE#
V
V
V
SS
DD
DD
REF
DD
SS
DL
Q
L
Supply Power supply: 1.8V ±0.1V.
Supply DQ power supply: 1.8V ±0.1V. Isolated on the device for
Supply DLL power supply: 1.8V ±0.1V.
Supply SSTL_18 reference voltage (V
Supply Ground.
Supply DLL ground: Isolated on the device from V
Input
Input
Type
I/O
I/O
I/O
I/O
I/O
I/O
Description
On-die termination: ODT (registered HIGH) enables termination
resistance internal to the DDR2 SDRAM. When enabled, ODT is
only applied to each of the following balls: DQ0–DQ15, LDM,
UDM, LDQS, LDQS#, UDQS, and UDQS# for the x16; DQ0–DQ7,
DQS, DQS#, RDQS, RDQS#, and DM for the x8; DQ0–DQ3, DQS,
DQS#, and DM for the x4. The ODT input will be ignored if
disabled via the LOAD MODE command.
Command inputs: RAS#, CAS#, and WE# (along with CS#) define
the command being entered.
Data input/output: Bidirectional data bus for 64 Meg x 16.
Data input/output: Bidirectional data bus for 128 Meg x 8.
Data input/output: Bidirectional data bus for 256 Meg x 4.
Data strobe: Output with read data, input with write data for
source synchronous operation. Edge-aligned with read data,
center-aligned with write data. DQS# is only used when
differential data strobe mode is enabled via the LOAD MODE
command.
Data strobe for lower byte: Output with read data, input with
write data for source synchronous operation. Edge-aligned with
read data, center-aligned with write data. LDQS# is only used
when differential data strobe mode is enabled via the LOAD
MODE command.
Data strobe for upper byte: Output with read data, input with
write data for source synchronous operation. Edge-aligned with
read data, center-aligned with write data. UDQS# is only used
when differential data strobe mode is enabled via the LOAD
MODE command.
via the LOAD MODE command to the extended mode register
(EMR). When RDQS is enabled, RDQS is output with read data only
and is ignored during write data. When RDQS is disabled, ball J3
becomes data mask (see DM ball). RDQS# is only used when RDQS
is enabled and differential data strobe mode is enabled.
improved noise immunity.
17
Micron Technology, Inc., reserves the right to change products or specifications without notice.
Ball Assignments and Descriptions
1Gb: x4, x8, x16 DDR2 SDRAM
DD
Q/2).
©2004 Micron Technology, Inc. All rights reserved.
SS
and V
SS
Q.