mt47h64m16hw-3 Micron Semiconductor Products, mt47h64m16hw-3 Datasheet - Page 29

• Manufacturer Part Number: mt47h64m16hw-3
• Description: 1gb X4, X8, X16 Ddr2 Sdram
• Manufacturer: Micron Semiconductor Products

Table 12:
PDF: 09005aef821ae8bf/Source: 09005aef821aed36
1Gb_DDR2_x4x8x16_D2.fm - 1Gb DDR2: Rev. N; Core DDR2: Rev. C 4/08 EN
Parameter/Condition
Operating one bank active-precharge current:
t
CKE is HIGH, CS# is HIGH between valid commands;
Address bus inputs are switching; Data bus inputs are
switching
Operating one bank active-read-precharge current:
I
t
CKE is HIGH, CS# is HIGH between valid commands;
Address bus inputs are switching; Data pattern is same
as I
Precharge power-down current: All banks idle;
t
bus inputs are stable; Data bus inputs are floating
Precharge quiet standby current: All banks idle;
t
and address bus inputs are stable; Data bus inputs are
floating
Precharge standby current: All banks idle;
t
and address bus inputs are switching; Data bus inputs
are switching
Active power-down current: All banks open;
t
bus inputs are stable; Data bus inputs are floating
Active standby current: All banks open;
t
CKE is HIGH, CS# is HIGH between valid commands;
Other control and address bus inputs are switching;
Data bus inputs are switching
Operating burst write current: All banks open,
continuous burst writes; BL = 4, CL = CL (I
t
CKE is HIGH, CS# is HIGH between valid commands;
Address bus inputs are switching; Data bus inputs are
switching
Operating burst read current: All banks open,
continuous burst reads, I
CL = CL (I
t
is HIGH between valid commands; Address bus inputs
are switching; Data bus inputs are switching
Burst refresh current:
command at every
HIGH between valid commands; Other control and
address bus inputs are switching; Data bus inputs are
switching
CK =
OUT
RC =
CK =
CK =
CK =
CK =
CK =
CK =
RAS =
DD
= 0mA; BL = 4, CL = CL (I
t
4W
t
t
t
t
t
t
t
RC (I
CK (I
CK (I
CK (I
CK (I
CK (I
CK (I
CK (I
t
RAS MAX (I
DD
DD
DD
DD
DD
DD
DD
DD
DD
), AL = 0;
),
DDR2 I
Notes: 1–7 (page 30) apply to the entire table
),
); CKE is LOW; Other control and address
); CKE is HIGH, CS# is HIGH; Other control
); CKE is HIGH, CS# is HIGH; Other control
); CKE is LOW; Other control and address
),
),
t
t
t
t
RAS =
RC =
RAS =
RAS =
t
DD
RFC (I
t
t
),
CK =
DD
RC (I
t
t
t
RAS MIN (I
RAS MAX (I
RAS MAX (I
t
RP =
t
OUT
CK =
DD
Specifications and Conditions (Die Revision E and G)
DD
t
CK (I
) interval; CKE is HIGH, CS# is
= 0mA; BL = 4,
DD
),
t
RP (I
t
t
CK (I
), AL = 0;
RAS =
DD
DD
DD
),
DD
DD
DD
),
); CKE is HIGH, CS#
),
),
t
t
); REFRESH
RAS MIN (I
RCD =
t
t
RP =
RP =
t
DD
CK =
), AL = 0;
t
t
t
RP (I
RP (I
RCD (I
t
CK (I
DD
DD
DD
);
DD
DD
);
);
),
);
Symbol Configuration -187E
I
I
I
I
I
I
I
DD
DD
DD
DD
29
I
I
DD
DD
DD
I
DD
DD
DD
4W
2Q
2N
3N
4R
2P
3P
0
1
5
Electrical Specifications – I
Micron Technology, Inc., reserves the right to change products or specifications without notice.
x4, x8, x16
MR12 = 0
MR12 = 1
Slow exit
Fast exit
x4, x8
x4, x8
x4, x8
x4, x8
x4, x8
x4, x8
x16
x16
x16
x16
x16
x16
x16
x16
x4
x4
x8
x8
1Gb: x4, x8, x16 DDR2 SDRAM
115
180
130
210
190
210
405
190
210
420
265
300
60
90
60
95
50
10
70
95
7
-25E/
150
110
175
145
160
315
145
160
320
235
280
-25
90
50
75
50
80
40
10
60
85
7
©2004 Micron Technology, Inc. All rights reserved.
-3E/
135
100
130
120
135
200
120
135
220
215
270
85
40
65
40
70
30
10
55
75
-3
7
DD
-37E -5E Units
110 110
120 115
110
125 105
180 160
110 105
125
180 160
210 205
250 240
70
95
40
45
40
50
30
10
45
60
Parameters
7
70
90
35
40
35
40
30
10
40
55
90
90
7
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA