mt47h64m16hw-3 Micron Semiconductor Products, mt47h64m16hw-3 Datasheet - Page 80

• Manufacturer Part Number: mt47h64m16hw-3
• Description: 1gb X4, X8, X16 Ddr2 Sdram
• Manufacturer: Micron Semiconductor Products

Figure 39:
Extended Mode Register (EMR)
PDF: 09005aef8117c187/Source: 09005aef821aed36
DDR2_x4x8x16_Core2.fm - 1Gb DDR2: Rev. N; Core DDR2: Rev. C 4/08 EN
DQS, DQS#
DQS, DQS#
Command
Command
CK#
CK#
DQ
DQ
CK
CK
READ
READ
CAS Latency (CL)
T0
T0
Notes:
1. BL = 4.
2. Posted CAS# additive latency (AL) = 0.
3. Shown with nominal
The extended mode register controls functions beyond those controlled by the mode
register; these additional functions are DLL enable/disable, output drive strength, on-
die termination (ODT), posted AL, off-chip driver impedance calibration (OCD), DQS#
enable/disable, RDQS/RDQS# enable/disable, and output disable/enable. These func-
tions are controlled via the bits shown in Figure 40 on page 81. The EMR is programmed
via the LM command and will retain the stored information until it is programmed again
or the device loses power. Reprogramming the EMR will not alter the contents of the
memory array, provided it is performed correctly.
The EMR must be loaded when all banks are idle and no bursts are in progress, and the
controller must wait the specified time
tion. Violating either of these requirements could result in an unspecified operation.
NOP
NOP
T1
T1
CL = 3 (AL = 0)
CL = 4 (AL = 0)
NOP
NOP
T2
T2
t
AC,
t
DQSCK, and
80
NOP
NOP
T3
T3
DO
n
Micron Technology, Inc., reserves the right to change products or specifications without notice.
t
t
MRD before initiating any subsequent opera-
DQSQ.
n + 1
DO
NOP
NOP
T4
T4
1Gb: x4, x8, x16 DDR2 SDRAM
n + 2
DO
DO
n
Transitioning data
n + 1
n + 3
DO
DO
©2003 Micron Technology, Inc. All rights reserved.
NOP
NOP
T5
T5
n + 2
DO
Operations
n + 3
DO
NOP
NOP
Don’t care
T6
T6