mc68hc912dg128 Freescale Semiconductor, Inc, mc68hc912dg128 Datasheet - Page 245

• Manufacturer Part Number: mc68hc912dg128
• Description: M68hc12 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

MCCNTH/L — Modulus Down-Counter Count Register
MC68HC912DG128 — Rev 3.0
MOTOROLA
RESET:
$00B6
$00B7
BIt 15
BIT 7
Bit 7
1
14
6
6
1
Read: any time
Write: any time
A full access for the counter register should take place in one clock cycle.
A separate read/write for high byte and low byte will give different result
than accessing them as a word.
If the RDMCL bit in MCCTL register is cleared, reads of the MCCNT
register will return the present value of the count register. If the RDMCL
bit is set, reads of the MCCNT will return the contents of the load
register.
If a $0000 is written into MCCNT and modulus counter while LATQ and
BUFEN in ICSYS ($AB) register are set, the input capture and pulse
accumulator registers will be latched.
With a $0000 write to the MCCNT, the modulus counter will stay at zero
and does not set the MCZF flag in MCFLG register.
If modulus mode is enabled (MODMC=1), a write to this address will
update the load register with the value written to it. The count register will
not be updated with the new value until the next counter underflow.
The FLMC bit in MCCTL ($A6) can be used to immediately update the
count register with the new value if an immediate load is desired.
If modulus mode is not enabled (MODMC=0), a write to this address will
clear the prescaler and will immediately update the counter register with
the value written to it and down-counts once to $0000.
Freescale Semiconductor, Inc.
For More Information On This Product,
13
5
5
1
Go to: www.freescale.com
Enhanced Capture Timer
12
4
4
1
11
3
3
1
10
2
2
1
1
9
1
1
Enhanced Capture Timer
BIT 0
Bit 8
Bit 0
1
Timer Registers
Technical Data
$00B6, $00B7
MCCNTH
MCCNTL
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