mc68hc912dg128 Freescale Semiconductor, Inc, mc68hc912dg128 Datasheet - Page 269

• Manufacturer Part Number: mc68hc912dg128
• Description: M68hc12 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

SP0BR — SPI Baud Rate Register
MC68HC912DG128 — Rev 3.0
MOTOROLA
RESET:
Bit 7
0
0
1. The serial pin control 0 bit enables bidirectional configurations.
2. Slave output is enabled if DDS4 = 1, SS = 0 and MSTR = 0. (#1, #3)
3. Master output is enabled if DDS5 = 1 and MSTR = 1. (#2, #4)
4. SCK output is enabled if DDS6 = 1 and MSTR = 1. (#2, #4)
5. SS output is enabled if DDS7 = 1, SSOE = 1 and MSTR = 1. (#2, #4)
#1
#2
#3
#4
Pin Mode
Bidirectional
6
0
0
SPC0 — Serial Pin Control 0
Read anytime. Write anytime.
At reset, E Clock divided by 2 is selected.
SPR[2:0] — SPI Clock (SCK) Rate Select Bits
Normal
Freescale Semiconductor, Inc.
This bit decides serial pin configurations with MSTR control bit.
These bits are used to specify the SPI clock rate.
For More Information On This Product,
SPR2
0
0
0
0
1
1
1
1
5
0
0
SPC0
SPR1
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0
0
1
1
0
0
1
1
Multiple Serial Interface
0
1
(1)
Table 14-4. SPI Clock Rate Selection
4
0
0
SPR0
0
1
0
1
0
1
0
1
MSTR
0
1
0
1
3
0
0
E Clock
Divisor
128
256
16
32
64
Slave Out
2
4
8
Master In Master Out
Slave I/O
MISO
GPI/O
SPR2
(2)
2
0
E Clock = 4 MHz
Frequency at
62.5 kHz
31.3 kHz
15.6 kHz
Master I/O
2.0 MHz
1.0 MHz
500 kHz
250 kHz
125 kHz
Slave In
MOSI
GPI/O
Serial Peripheral Interface (SPI)
SPR1
(3)
1
0
Multiple Serial Interface
SCK Out
SCK Out
E Clock = 8 MHz
SCK In
SCK In
SCK
Frequency at
SPR0
Bit 0
62.5 KHz
31.3 KHz
500 KHz
250 KHz
125 KHz
4.0 MHz
2.0 MHz
1.0 MHz
0
(4)
Technical Data
SS I/O
SS I/O
SS In
SS In
SS
$00D2
(5)
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