mc68hc912dg128 Freescale Semiconductor, Inc, mc68hc912dg128 Datasheet - Page 257

• Manufacturer Part Number: mc68hc912dg128
• Description: M68hc12 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

SC0SR1/SC1SR1 — SCI Status Register 1
MC68HC912DG128 — Rev 3.0
MOTOROLA
RESET:
TDRE
Bit 7
1
TC
6
1
TE — Transmitter Enable
RE — Receiver Enable
RWU — Receiver Wake-Up Control
SBK — Send Break
The bits in these registers are set by various conditions in the SCI
hardware and are automatically cleared by special acknowledge
sequences. The receive related flag bits in SCxSR1 (RDRF, IDLE, OR,
NF, FE, and PF) are all cleared by a read of the SCxSR1 register
followed by a read of the transmit/receive data register low byte.
However, only those bits which were set when SCxSR1 was read will be
Freescale Semiconductor, Inc.
As long as SBK remains set the transmitter will send zeros. When
SBK is changed to zero, the current frame of all zeros is finished
before the TxD line goes to the idle state. If SBK is toggled on and off,
the transmitter will send only 10 (or 11) zeros and then revert to mark
idle or sending data.
For More Information On This Product,
0 = Transmitter disabled
1 = SCI transmit logic is enabled and the TXD pin (Port S bit 1/bit
0 = Receiver disabled
1 = Enables the SCI receive circuitry.
0 = Normal SCI Receiver
1 = Enables the wake-up function and inhibits further receiver
0 = Break generator off
1 = Generate a break code (at least 10 or 11 contiguous zeros).
RDRF
5
0
3) is dedicated to the transmitter. The TE bit can be used to
queue an idle preamble.
interrupts. Normally hardware wakes the receiver by
automatically clearing this bit.
Go to: www.freescale.com
Multiple Serial Interface
IDLE
4
0
OR
3
0
NF
2
0
Serial Communication Interface (SCI)
FE
1
0
Multiple Serial Interface
Bit 0
PF
0
Technical Data
$00C4/$00CC
257