isp1563 NXP Semiconductors, isp1563 Datasheet - Page 13

• Manufacturer Part Number: isp1563
• Description: Hi-speed Universal Serial Bus Pci Host Controller
• Manufacturer: NXP Semiconductors

NXP Semiconductors
ISP1563_2
Product data sheet
7.10 Power supply
7.7 Legacy support
7.8 Phase-Locked Loop (PLL)
7.9 Power-On Reset (POR)
The ISP1563 provides legacy support for a USB keyboard and mouse. This means that
the keyboard and mouse must be able to work even before the Operating System (OS)
boot-up, with the necessary support in the Basic Input Output System (BIOS).
Section 11.2
A 12 MHz-to-30 MHz and 48 MHz clock multiplier PLL is integrated on-chip. This allows
the use of a low-cost 12 MHz crystal, which also minimizes EMI. No external components
are required for the PLL to operate.
Figure 3
start with 1. At t1, the detector passes through the trip level. Another delay will be added
before POR drops to 0 to ensure that the length of the generated detector pulse, POR, is
large enough to reset asynchronous flip-flops. If the dip is too short (t4 to t5 < 11 s), POR
will not react and will stay LOW.
Figure 4
Fig 3. Power-on reset
V
shows a possible curve of V
shows the ISP1563 power supply connection.
POR(trip)
t0
provides a detailed description on the legacy support in the ISP1563.
is typically 1.2 V.
t1
Rev. 02 — 15 March 2007
CC(I/O)
t2
with dips at t2 to t3 and t4 to t5. At t0, POR will
t3
t4
HS USB PCI Host Controller
t5
004aaa664
© NXP B.V. 2007. All rights reserved.
V
V
POR
ISP1563
CC(I/O)
POR(trip)
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