isp1563 NXP Semiconductors, isp1563 Datasheet - Page 57

• Manufacturer Part Number: isp1563
• Description: Hi-speed Universal Serial Bus Pci Host Controller
• Manufacturer: NXP Semiconductors

NXP Semiconductors
Table 83.
Address: Content of the base address register + 50h
[1]
Table 84.
Address: Content of the base address register + 50h
ISP1563_2
Product data sheet
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
31
30 to 18
17
16
15
14 to 2
The reserved bits should always be written with the reset value.
Symbol
CRWE
reserved
CCIC
LPSC
DRWE
reserved
HcRhStatus - Host Controller Root Hub Status register bit allocation
HcRhStatus - Host Controller Root Hub Status register bit description
CRWE
DRWE
R/W
R/W
R/W
R/W
31
23
15
0
0
0
7
0
Description
On write, Clear Remote Wake-up Enable:
0 — No effect
1 — Clears DRWE (Device Remote Wake-up Enable)
-
Overcurrent Indicator Change: This bit is set by hardware when a change has occurred to the OCI
bit of this register.
0 — No effect
1 — The HCD clears this bit.
On read, Local Power Status Change: The root hub does not support the local power status feature.
Therefore, this bit is always logic 0.
On write, Set Global Power: In global power mode (Power Switching Mode = 0), logic 1 is written to
this bit to turn on power to all ports (clear Port Power Status). In per-port power mode, it sets Port
Power Status only on ports whose Port Power Control Mask bit is not set. Writing logic 0 has no
effect.
On read, Device Remote Wake-up Enable: This bit enables bit Connect Status Change (CSC) as a
resume event, causing a state transition from USBSUSPEND to USBRESUME and setting the
Resume Detected interrupt.
0 — CSC is not a remote wake-up event.
1 — CSC is a remote wake-up event.
On write, Set Remote Wake-up Enable: Writing logic 1 sets DRWE (Device Remote Wake-up
Enable). Writing logic 0 has no effect.
-
R/W
R/W
R/W
R/W
30
22
14
0
0
0
6
0
R/W
R/W
R/W
R/W
29
21
13
0
0
0
5
0
reserved
reserved
Rev. 02 — 15 March 2007
[1]
[1]
R/W
R/W
R/W
R/W
28
20
12
0
0
0
4
0
reserved
reserved
R/W
R/W
R/W
R/W
27
19
11
0
0
0
3
0
[1]
[1]
R/W
R/W
R/W
R/W
26
18
10
0
0
0
2
0
HS USB PCI Host Controller
CCIC
R/W
R/W
R/W
OCI
25
17
R
0
0
9
0
1
0
© NXP B.V. 2007. All rights reserved.
ISP1563
LPSC
R/W
R/W
R/W
LPS
R/W
57 of 102
24
16
0
0
8
0
0
0