isp1563 NXP Semiconductors, isp1563 Datasheet - Page 62

• Manufacturer Part Number: isp1563
• Description: Hi-speed Universal Serial Bus Pci Host Controller
• Manufacturer: NXP Semiconductors

NXP Semiconductors
Table 89.
Address: Content of the base address register + 100h
[1]
Table 90.
Address: Content of the base address register + 100h
ISP1563_2
Product data sheet
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
31 to 9
8
7
6
5
4
3
The reserved bits should always be written with the reset value.
HceControl - Host Controller Emulation Control register bit allocation
HceControl - Host Controller Emulation Control register bit description
Symbol
reserved
A20S
IRQ12A
IRQ1A
GA20S
EIRQEN
IRQEN
11.2.1 HceControl register
IRQ12A
R/W
R/W
R/W
R/W
31
23
15
0
0
0
7
0
Table 89
Description
-
A20 State: This bit indicates the current state of gate A20 on the keyboard controller. It is used
to compare against value written to 60h when GA20S is active.
IRQ12 Active: This bit indicates that a positive transition on IRQ12 from the keyboard controller
has occurred.
0 — No effect
1 — Sets IRQ12 to logic 0 (inactive)
IRQ1 Active: This bit indicates that a positive transition on IRQ1 from the keyboard controller
has occurred.
0 — No effect
1 — Sets IRQ11 to logic 0 (inactive)
Gate A20 Sequence: This bit is set by the Host Controller when a data value of D1h is written
to I/O port 64h and cleared on a write to I/O port 64h of any value other than D1h.
External IRQ Enable: When this bit is set to logic 1, IRQ1 and IRQ12 from the keyboard
controller cause an emulation interrupt. This bit is independent of the setting of the EE bit in this
register.
IRQ Enable: When this bit is set, the Host Controller generates IRQ1 or IRQ12 as long as
OUT_FULL (bit 0 in HceStatus) is logic 1. If AUX_OUT_FULL (bit 5 in HceStatus) is logic 0,
then IRQ1 is generated; if it is logic 1, then IRQ12 is generated.
IRQ1A
R/W
R/W
R/W
R/W
30
22
14
0
0
0
6
0
shows the bit allocation of the register.
GA20S
R/W
R/W
R/W
R/W
29
21
13
0
0
0
5
0
Rev. 02 — 15 March 2007
reserved
EIRQEN
R/W
R/W
R/W
R/W
28
20
12
0
0
0
4
0
reserved
reserved
[1]
IRQEN
[1]
[1]
R/W
R/W
R/W
R/W
27
19
11
0
0
0
3
0
R/W
R/W
R/W
C_P
R/W
26
18
10
0
0
0
2
0
HS USB PCI Host Controller
R/W
R/W
R/W
25
17
EI
R
0
0
9
0
1
0
© NXP B.V. 2007. All rights reserved.
ISP1563
A20S
R/W
R/W
R/W
R/W
EE
62 of 102
24
16
0
0
8
0
0
0