isp1563 NXP Semiconductors, isp1563 Datasheet - Page 38

• Manufacturer Part Number: isp1563
• Description: Hi-speed Universal Serial Bus Pci Host Controller
• Manufacturer: NXP Semiconductors

NXP Semiconductors
Table 46.
Address: Content of the base address register + 04h
ISP1563_2
Product data sheet
Bit
9
8
7 to 6
5
4
3
2
HcControl - Host Controller Control register bit description
Symbol
RWC
IR
HCFS[1:0]
BLE
CLE
IE
PLE
Description
Remote Wake-up Connected: This bit indicates whether the Host Controller supports remote
wake-up signaling. If remote wake-up is supported and used by the system, it is the
responsibility of the system firmware to set this bit during POST. The Host Controller clears the
bit on a hardware reset but does not alter it on a software reset. Remote wake-up signaling of
the host system is host-bus-specific and is not described in this specification.
Interrupt Routing: This bit determines the routing of interrupts generated by events registered
in HcInterruptStatus. If clear, all interrupts are routed to the normal host bus interrupt
mechanism. If set, interrupts are routed to the system management interrupt. The HCD clears
this bit on a hardware reset, but it does not alter this bit on a software reset. The HCD uses this
bit as a tag to indicate the ownership of the Host Controller.
Host Controller Functional State for USB:
00b — USBRESET
01b — USBRESUME
10b — USBOPERATIONAL
11b — USBSUSPEND
A transition to USBOPERATIONAL from another state causes SOF generation to begin 1 ms
later. The HCD may determine whether the Host Controller has begun sending SOFs by reading
SF (bit 2 of HcInterruptStatus).
This field may be changed by the Host Controller only when in the USBSUSPEND state. The
Host Controller may move from the USBSUSPEND state to the USBRESUME state after
detecting the resume signaling from a downstream port.
The Host Controller enters USBSUSPEND after a software reset; it enters USBRESET after a
hardware reset. The latter also resets the root hub and asserts subsequent reset signaling to
downstream ports.
Bulk List Enable: This bit is set to enable the processing of the bulk list in the next Frame. If
cleared by the HCD, processing of the bulk list does not occur after the next SOF. The Host
Controller checks this bit whenever it wants to process the list. When disabled, the HCD may
modify the list. If HcBulkCurrentED is pointing to an Endpoint Descriptor (ED) to be removed, the
HCD must advance the pointer by updating HcBulkCurrentED before re-enabling processing of
the list.
Control List Enable: This bit is set to enable the processing of the control list in the next frame.
If cleared by the HCD, processing of the control list does not occur after the next SOF. The Host
Controller must check this bit whenever it wants to process the list. When disabled, the HCD
may modify the list. If HcControlCurrentED is pointing to an ED to be removed, the HCD must
advance the pointer by updating HcControlCurrentED before re-enabling processing of the list.
Isochronous Enable: This bit is used by the HCD to enable or disable processing of
isochronous EDs. While processing the periodic list in a frame, the Host Controller checks the
status of this bit when it finds an isochronous ED (that is, the Format bit of ED is logic 1; for
details, refer to Open Host Controller Interface Specification for USB Rev. 1.0a ). If set (enabled),
the Host Controller continues processing the EDs. If cleared (disabled), the Host Controller halts
processing of the periodic list, which now contains only isochronous EDs, and begins
processing the bulk or control lists. Setting this bit is guaranteed to take effect in the next frame
and not the current frame.
Periodic List Enable: This bit is set to enable the processing of the periodic list in the next
frame. If cleared by the HCD, processing of the periodic list does not occur after the next SOF.
The Host Controller must check this bit before it starts processing the list.
Rev. 02 — 15 March 2007
…continued
HS USB PCI Host Controller
© NXP B.V. 2007. All rights reserved.
ISP1563
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