tmp88fw45afg TOSHIBA Semiconductor CORPORATION, tmp88fw45afg Datasheet - Page 111

• Manufacturer Part Number: tmp88fw45afg
• Description: 8 Bit Microcontroller Tlcs-870/x Series
• Manufacturer: TOSHIBA Semiconductor CORPORATION

Setting-up the CTC1CR2 Register
Setting-up the CTC1CR1 Register
EXTRGDIS
CTC1REG
CTC1FF0
CTC1RES
CTC1CK
CTC1SM
CTC1SE
CTC1CY
PPGFF0
Note 1: fc: Clock [Hz]
Note 2: Make sure the timer/counter is idle (CTC1CR1<CTC1SM, CTC1S> = 00) before setting operation mode, edge, start,
Note 3: When DV1CK=1, CTC1CR2<CTC1CK>=100 cannot be used.
Note 4: When CTC1 input is not used in the CTC1 timer, external trigger input must be disabled (CTC1CR2<EXTRGDIS> = 1)
Note 5: The CTC1DRB and CTC1DRC Registers cannot be accessed for write unless they are set for PPG output mode and
Note 6: CTC1CR1<CTC1E> is effective only when using an external clock as trigger (CTC1CR1<CTC1SM>).
Note 7: Data must be written to as many data registers as set with CTC1CR2<CTC1REG>.
Note 8: To write data to CTC1DRA/B/C, use the LDW instruction, or use the LD instruction writing in order of L, H.
Note 9: Data register values must be written to the respective registers before starting. To modify the values after starting, write
CTC1M
CTC1S
CTC1E
source clock, external trigger timer mode control, and PPG output control.
regardless of the selected mode.
specified with CTC1CR2<CTC1REG>.
the new data within an interval from an INTCTC1 interrupt to the next INTCTC1.
Control timer output F/F0
Select timer/counter clock
source
Unit: Hz
Set registers used by timer/
counter
External trigger input
Control start
Select start
Select external trigger edge
Select external trigger start
edge
Select cycle
Set operation mode
Select PPG output
Reset all
Note4
0: Clear
1: Set
00: CTC1DRA
01: CTC1DRA + CTC1DRB
10: CTC1DRA + CTC1DRB + CTC1DRC
11: Reserved
0: Enable external trigger input
1: Disable external trigger input
0: Stop and clear counter
1: Command start
0: Software start
1: External trigger start
0: Enable one edge
1: Enable both edges
0: Rising edge
1: Falling edge
0: Successive
1: One shot
0: Timer/Event counter modes
1: PPG (programmable pulse generator) output mode
0: Forward output immediately after start
1: Reverse output immediately after start
0: Normal operation
1: CTC1 reset
000
001
010
011
100
101
110
111
DV1CK = 0
Page 97
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
−
External clock input
(CTC1 pin input)
11
7
5
3
2
NORMAL and IDLE Modes
DV1CK = 1
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
−
12
8
6
4
3
2
1REG
2REG
3REG
Timer
Timer
ο
ο
ο
ο
ο
ο
ο
ο
ο
ο
×
ο
ο
ο
ο
ο
ο
-
Event
Event
×
×
×
ο
ο
ο
ο
ο
ο
ο
−
−
−
−
−
−
×
○
TMP88FW45AFG
PPG
PPG
ο
ο
ο
ο
ο
ο
ο
ο
ο
ο
ο
×
×
×
×
ο
×
×
Note3
R/W
R/W