tmp88fw45afg TOSHIBA Semiconductor CORPORATION, tmp88fw45afg Datasheet - Page 204

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tmp88fw45afg

Manufacturer Part Number
tmp88fw45afg
Description
8 Bit Microcontroller Tlcs-870/x Series
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
16.2
Control
16.2
UART2 Control Register2
UART2 Control Register1
UARTCR22
UARTCR21
(01F71H)
(01F70H)
monitored using the UART status register (UARTSR2).
UART2 is controlled by the UART2 Control Registers (UARTCR21, UARTCR22). The operating status can be
Note 1: When operations are disabled by setting UARTCR21<TXE and RXE> bits to “0”, the setting becomes valid when data
Note 2: The transmit clock and the parity are common to transmit and receive.
Note 3: UARTCR21<RXE> and UARTCR21<TXE> should be set to “0” before UARTCR21<BRG> is changed.
Note 4: In case fc = 20MHz, the timer counter 4 (TC4) is available as a baud rate generator.
Note 1: Settings of RXDNC are limited depending on the transfer clock specified by BRG. The combination "Ο" is available but
Control
TXE
STOPBR
RXDNC
7
7
transmit or receive complete. When the transmit data is stored in the transmit data buffer, the data are not transmitted.
Even if data transmit is enabled, until new data are written to the transmit data buffer, the current data are not transmitted.
please do not select the combination "-". The transfer clock is calculated by the following equation : Transfer clock [Hz]
=INTTC4 sourcec clock [Hz] ÷ TC4DR set value
EVEN
STBT
BRG
RXE
TXE
PE
RXE
6
6
Selection of RXD input noise
rejectio time
Receive stop bit length
Transfer operation
Receive operation
Transmit stop bit length
Even-numbered parity
Parity addition
Transmit clock select
STBT
5
5
EVEN
4
4
PE
3
3
2
2
RXDNC
Page 190
000:
001:
010:
011:
100:
101:
110:
111:
00:
01:
10:
11:
0:
1:
0:
1:
0:
1:
0:
1:
0:
1:
0:
1:
BRG
1
1
No noise rejection (Hysteresis input)
Rejects pulses shorter than 31/fc [s] as noise
Rejects pulses shorter than 63/fc [s] as noise
Rejects pulses shorter than 127/fc [s] as noise
1 bit
2 bits
Disable
Enable
Disable
Enable
1 bit
2 bits
Odd-numbered parity
Even-numbered parity
No parity
Parity
fc/13 [Hz]
fc/26
fc/52
fc/104
fc/208
fc/416
Input INTTC4
fc/96
STOPBR
0
0
(Initial value: 0000 0000)
(Initial value: **** *000)
TMP88FW45AFG
Write
Write
only
only

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