tmp88fw45afg TOSHIBA Semiconductor CORPORATION, tmp88fw45afg Datasheet - Page 145

• Manufacturer Part Number: tmp88fw45afg
• Description: 8 Bit Microcontroller Tlcs-870/x Series
• Manufacturer: TOSHIBA Semiconductor CORPORATION

Example :Generating a pulse with 1-ms high-level width and a period of 32.768 ms (fc = 20.0 MHz)
shifted by the INTTCj interrupt request and loaded into PWREG6 and 5. While the timer is stopped, the values
are shifted immediately after the programming of PWREG6 and 5. Set the lower byte (PWREG5) and upper byte
(PWREG5) in this order to program PWREG6 and 5. (Programming only the lower or upper byte of the register
should not be attempted.)
read, but not the values set in PWREG6 and 5. Therefore, after writing to the PWREG6 and 5, reading data of
PWREG6 and 5 is previous value until INTTC6 is generated.
Table 13-6 16-Bit PWM Output Mode
Note 1: In the PWM mode, program the timer register PWREG6 and 5 immediately after the INTTC6 interrupt request
Note 2: When the timer is stopped during PWM output, the PWM6 pin holds the output status when the timer is
Note 3: To enter the STOP mode, stop the timer and then enter the STOP mode. If the STOP mode is entered without
If executing the read instruction to PWREG6 and 5 during PWM output, the values set in the shift register is
For the pin used for PWM output, the output latch of the I/O port must be set to 1.
DV1CK = 0
fc/2
fc/2
fc/2
fc/2
11
NORMAL, IDLE mode
[Hz]
is generated (normally in the INTTC6 interrupt service routine.) If the programming of PWREGj and the
interrupt request occur at the same time, an unstable value is shifted, that may result in generation of pulse
different from the programmed value until the next INTTC6 interrupt request is generated.
stopped. To change the output status, program TC6CR<TFF6> after the timer is stopped. Do not program
TC6CR<TFF6> upon stopping of the timer.
Example: Fixing thePWM6 pin to the high level when the TimerCounter is stopped
CLR (TC6CR).3: Stops the timer.
CLR (TC6CR).7 : Sets the PWM6 pin to the high level.
stopping of the timer when fc or fc/2 is selected as the source clock, a pulse is output from the PWM6 pin
during the warm-up period time after exiting the STOP mode.
7
5
3
Source Clock
LDW
LD
LD
LD
DV1CK = 1
fc/2
fc/2
fc/2
fc/2
12
Setting ports
(PWREG5), 07D0H
(TC5CR), 33H
(TC6CR), 056H
(TC6CR), 05EH
[Hz]
8
6
4
fc = 20 MHz
DV1CK = 0
102.4 μs
6.4 μs
1.6 μs
0.4 μs
Page 131
Resolution
: Sets the pulse width.
: Sets the operating clock to fc/2
mode (lower byte).
: Sets TFF6 to the initial value 0, and 16-bit PWM signal
generation mode (upper byte).
: Starts the timer.
fc = 20 MHz
DV1CK = 1
204.8 μs
12.8 μs
3.2 μs
0.8 μs
fc = 20 MHz
DV1CK = 0
419.4 ms
104.9 ms
26.2 ms
6.7 s
3
, and 16-bit PWM output
Repeated Cycle
fc = 20 MHz
DV1CK = 1
838.8 ms
209.7 ms
52.4 ms
13.4 s
TMP88FW45AFG