MC68HC08AZ60ACFU MOTOROLA [Motorola, Inc], MC68HC08AZ60ACFU Datasheet - Page 106

• Manufacturer Part Number: MC68HC08AZ60ACFU
• Description: Microcontrollers
• Manufacturer: MOTOROLA [Motorola, Inc]

Central Processor Unit (CPU)
7.6 Low-Power Modes
7.6.1 WAIT Mode
7.6.2 STOP Mode
7.7 CPU During Break Interrupts
Advance Information
106
The WAIT and STOP instructions put the MCU in low--power
consumption standby modes.
The WAIT instruction:
The STOP instruction:
After exiting STOP mode, the CPU clock begins running after the
oscillator stabilization delay.
If the break module is enabled, a break interrupt causes the CPU to
execute the software interrupt instruction (SWI) at the completion of the
current CPU instruction. See Break Module. The program counter
vectors to $FFFC–$FFFD ($FEFC–$FEFD in monitor mode).
A return from interrupt instruction (RTI) in the break routine ends the
break interrupt and returns the MCU to normal operation if the break
interrupt has been deasserted.
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clears the interrupt mask (I bit) in the condition code register,
enabling interrupts. After exit from WAIT mode by interrupt, the I
bit remains clear. After exit by reset, the I bit is set.
Disables the CPU clock
clears the interrupt mask (I bit) in the condition code register,
enabling external interrupts. After exit from STOP mode by
external interrupt, the I bit remains clear. After exit by reset, the I
bit is set.
Disables the CPU clock
Central Processor Unit (CPU)
MC68HC08AZ60A — Rev 0.0
MOTOROLA