MC68HC08AZ60ACFU MOTOROLA [Motorola, Inc], MC68HC08AZ60ACFU Datasheet - Page 296

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MC68HC08AZ60ACFU

Manufacturer Part Number
MC68HC08AZ60ACFU
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
Timer Interface Module B (TIMB)
Advance Information
296
NOTE:
NOTE:
TSTOP — TIMB Stop Bit
Do not set the TSTOP bit before entering wait mode if the TIMB is
required to exit wait mode. Also, when the TSTOP bit is set and the timer
is configured for input capture operation, input captures are inhibited
until TSTOP is cleared.
TRST — TIMB Reset Bit
Setting the TSTOP and TRST bits simultaneously stops the TIMB
counter at a value of $0000.
PS[2:0] — Prescaler Select Bits
This read/write bit stops the TIMB counter. Counting resumes when
TSTOP is cleared. Reset sets the TSTOP bit, stopping the TIMB
counter until software clears the TSTOP bit.
Setting this write-only bit resets the TIMB counter and the TIMB
prescaler. Setting TRST has no effect on any other registers. Counting
resumes from $0000. TRST is cleared automatically after the TIMB
counter is reset and always reads as logic 0. Reset clears the TRST bit.
These read/write bits select either the PTD4/ATD12/TBCLK pin or
one of the seven prescaler outputs as the input to the TIMB counter
as
1 = TIMB counter stopped
0 = TIMB counter active
1 = Prescaler and TIMB counter cleared
0 = No effect
Table 18-1
Timer Interface Module B (TIMB)
PS[2:0]
000
001
010
100
101
011
110
111
shows. Reset clears the PS[2:0] bits.
Table 18-1. Prescaler Selection
Internal Bus Clock
Internal Bus Clock
Internal Bus Clock
Internal Bus Clock
Internal Bus Clock
Internal Bus Clock
Internal Bus Clock 1
PTD4/ATD12/TBCLK
TIMB Clock Source
MC68HC08AZ60A — Rev 0.0
16
32
64
2
4
8
MOTOROLA

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