MC68HC08AZ60ACFU MOTOROLA [Motorola, Inc], MC68HC08AZ60ACFU Datasheet - Page 415

• Manufacturer Part Number: MC68HC08AZ60ACFU
• Description: Microcontrollers
• Manufacturer: MOTOROLA [Motorola, Inc]

23.4.4.3 PWM Initialization
MC68HC08AZ60A — Rev 0.0
MOTOROLA
NOTE:
initially control the pulse width on the PTF2 pin. Writing to the TIMA
channel 5 registers enables the TIMA channel 5 registers to
synchronously control the pulse width at the beginning of the next PWM
period. At each subsequent overflow, the TIMA channel registers (4 or
5) that control the pulse width are the ones written to last. TASC4
controls and monitors the buffered PWM function and TIMA channel 5
status and control register (TASC5) is unused. While the MS4B bit is set,
the channel 5 pin, PTF3, is available as a general-purpose I/O pin.
In buffered PWM signal generation, do not write new pulse width values
to the currently active channel registers. User software should track the
currently active channel to prevent writing a new value to the active
channel. Writing to the active channel registers is the same as
generating unbuffered PWM signals.
To ensure correct operation when generating unbuffered or buffered
PWM signals, use the following initialization procedure:
1. In the TIMA status and control register (TASC):
2. In the TIMA counter modulo registers (TAMODH–TAMODL) write
3. In the TIMA channel x registers (TACHxH–TACHxL) write the
4. In TIMA channel x status and control register (TASCx):
the value for the required PWM period.
value for the required pulse width.
a. Stop the TIMA counter and prescaler by setting the TIMA stop
b. Reset the TIMA counter and prescaler by setting the TIMA
a. Write 0:1 (for unbuffered output compare or PWM signals) or
b. Write 1 to the toggle-on-overflow bit, TOVx.
Timer Interface Module A (TIMA)
bit, TSTOP.
reset bit, TRST.
1:0 (for buffered output compare or PWM signals) to the
mode select bits, MSxB–MSxA (see
Timer Interface Module A (TIMA)
Table
Functional Description
23-2).
Advance Information
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