MC68HC08AZ60ACFU MOTOROLA [Motorola, Inc], MC68HC08AZ60ACFU Datasheet - Page 239

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MC68HC08AZ60ACFU

Manufacturer Part Number
MC68HC08AZ60ACFU
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
16.9.4 SCI Status Register 1
MC68HC08AZ60A — Rev 0.0
MOTOROLA
Address:
SCI status register 1 contains flags to signal the following conditions:
SCTE — SCI Transmitter Empty Bit
Reset:
Read:
Write:
This clearable, read-only bit is set when the SCDR transfers a
character to the transmit shift register. SCTE can generate an SCI
transmitter CPU interrupt request. When the SCTIE bit in SCC2 is set,
SCTE generates an SCI transmitter CPU interrupt request. In normal
operation, clear the SCTE bit by reading SCS1 with SCTE set and
then writing to SCDR. Reset sets the SCTE bit.
1 = SCDR data transferred to transmit shift register
0 = SCDR data not transferred to transmit shift register
Transfer of SCDR data to transmit shift register complete
Transmission complete
Transfer of receive shift register data to SCDR complete
Receiver input idle
Receiver overrun
Noisy data
Framing error
Parity error
Serial Communications Interface (SCI)
$0016
SCTE
Bit 7
1
Figure 16-14. SCI Status Register 1 (SCS1)
= Unimplemented
TC
6
1
SCRF
5
0
IDLE
4
0
Serial Communications Interface (SCI)
OR
3
0
NF
2
0
Advance Information
FE
1
0
I/O Registers
Bit 0
PE
0
239

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