MC68HC08AZ60ACFU MOTOROLA [Motorola, Inc], MC68HC08AZ60ACFU Datasheet - Page 118

• Manufacturer Part Number: MC68HC08AZ60ACFU
• Description: Microcontrollers
• Manufacturer: MOTOROLA [Motorola, Inc]

System Integration Module (SIM)
8.2 Introduction
Advance Information
118
8.9
8.9.1
8.9.2
8.9.3
This section describes the system integration module, which supports up
to 24 external and/or internal interrupts. Together with the CPU, the SIM
controls all MCU activities. A block diagram of the SIM is shown in
Figure
a system state controller that coordinates CPU and exception timing.
The SIM is responsible for:
•
•
•
•
Bus clock generation and control for CPU and peripherals
– STOP/WAIT/reset/break entry and recovery
– Internal clock control
Master reset control, including power-on reset (POR) and COP
timeout
Interrupt control:
– Acknowledge timing
– Arbitration control timing
– Vector address generation
CPU enable/disable timing
SIM Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 134
8-1.
SIM Break Status Register (SBSR) . . . . . . . . . . . . . . . . . 134
SIM Reset Status Register (SRSR) . . . . . . . . . . . . . . . . . 136
SIM Break Flag Control Register (SBFCR). . . . . . . . . . . 137
System Integration Module (SIM)
Table 8-1
is a summary of the SIM I/O registers. The SIM is
MC68HC08AZ60A — Rev 0.0
MOTOROLA