MC68HC08AZ60ACFU MOTOROLA [Motorola, Inc], MC68HC08AZ60ACFU Datasheet - Page 262
MC68HC08AZ60ACFU
Manufacturer Part Number
MC68HC08AZ60ACFU
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC08AZ60ACFU.pdf
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Serial Peripheral Interface (SPI)
Advance Information
262
READ SPSCR
READ SPDR
OVRF
SPRF
1
2
3
4
CPU READS SPSCR WITH SPRF BIT SET
BYTE 1 SETS SPRF BIT.
AND OVRF BIT CLEAR.
CPU READS BYTE 1 IN SPDR,
CLEARING SPRF BIT.
BYTE 2 SETS SPRF BIT.
BYTE 1
Figure 17-7. Missed Read of Overflow Condition
The first part of
to clear the SPRF without problems. However, as illustrated by the
second transmission example, the OVRF flag can be set in the interval
between SPSCR and SPDR being read.
In this case, an overflow can easily be missed. Since no more SPRF
interrupts can be generated until this OVRF is serviced, it will not be
obvious that bytes are being lost as more transmissions are completed.
To prevent this, the OVRF interrupt should be enabled, or alternatively
another read of the SPSCR should be carried out following the read of
the SPDR. This ensures that the OVRF was not set before the SPRF
was cleared and that future transmissions will terminate with an SPRF
interrupt.
second SPSCR read, enable the OVRF to the CPU by setting the ERRIE
bit.
1
2
3
Figure 17-8
Serial Peripheral Interface (SPI)
BYTE 2
Figure 17-7
4
illustrates this process. Generally, to avoid this
BYTE 3
5
6
7
8
5
shows how to read the SPSCR and SPDR
CPU READS SPSCRW WITH SPRF BIT SET
AND OVRF BIT CLEAR.
BYTE 3 SETS OVRF BIT. BYTE 3 IS LOST.
CPU READS BYTE 2 IN SPDR, CLEARING SPRF
BUT NOT OVRF BIT.
BYTE 4 FAILS TO SET SPRF BIT BECAUSE
OVRF BIT IS SET. BYTE 4 IS LOST.
6
7
BYTE 4
8
MC68HC08AZ60A — Rev 0.0
MOTOROLA
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