MC68HC08AZ60ACFU MOTOROLA [Motorola, Inc], MC68HC08AZ60ACFU Datasheet - Page 338

• Manufacturer Part Number: MC68HC08AZ60ACFU
• Description: Microcontrollers
• Manufacturer: MOTOROLA [Motorola, Inc]

I/O Ports
20.9.2 Data Direction Register G (DDRG)
Advance Information
338
NOTE:
DDRG
$000E
Data direction register G determines whether each port G pin is an input
or an output. Writing a logic one to a DDRG bit enables the output buffer
for the corresponding port G pin; a logic zero disables the output buffer.
DDRG[2:0] — Data Direction Register G Bits
Avoid glitches on port G pins by writing to the port G data register before
changing data direction register G bits from 0 to 1.
Figure 20-21
Reset:
Read:
Write:
These read/write bits control port G data direction. Reset clears
DDRG[2:0], configuring all port G pins as inputs.
1 = Corresponding port G pin configured as output
0 = Corresponding port G pin configured as input
Figure 20-20. Data Direction Register G (DDRG)
READ DDRG ($000E)
WRITE DDRG ($000E)
WRITE PTG ($000A)
READ PTG ($000A)
Bit 7
0
0
shows the port G I/O logic.
0
6
0
Figure 20-21. Port G I/O Circuit
I/O Ports
RESET
= Unimplemented
5
0
0
DDRGx
PTGx
4
0
0
3
0
0
MC68HC08AZ60A — Rev 0.0
DDRG2 DDRG1 DDRG0
2
0
1
0
MOTOROLA
Bit 0
PTGx
0