MC68HC08AZ60ACFU MOTOROLA [Motorola, Inc], MC68HC08AZ60ACFU Datasheet - Page 393

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MC68HC08AZ60ACFU

Manufacturer Part Number
MC68HC08AZ60ACFU
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
21.14.13 MSCAN08 Identifier Mask Registers (CIDMR0-3)
MC68HC08AZ60A — Rev 0.0
MOTOROLA
NOTE:
CIDMRO
CIDMR1
CIDMR2
CIDMR3
AC7–AC0 — Acceptance Code Bits
The CIDAR0–3 registers can be written only if the SFTRES bit in
CMCR0 is set
The identifier mask registers specify which of the corresponding bits in
the identifier acceptance register are relevant for acceptance filtering.
For standard identifiers it is required to program the last three bits (AM2-
AM0) in the mask register CIDMR1 to ‘don’t care’.
Reset:
Reset:
Reset:
Reset:
Read:
Read:
Read:
Read:
Write:
Write:
Write:
Write:
AC7–AC0 comprise a user-defined sequence of bits with which the
corresponding bits of the related identifier register (IDRn) of the
receive message buffer are compared. The result of this comparison
is then masked with the corresponding identifier mask register.
Figure 21-27. Identifier Mask Registers (CIDMR0–CIDMR3)
Bit 7
AM7
Bit 7
AM7
Bit 7
AM7
Bit 7
AM7
Address: $0514
Address: $0515
Address: $0516
Address: $0517
MSCAN08 Controller (MSCAN08)
AM6
AM6
AM6
AM6
6
6
6
6
AM5
AM5
AM5
AM5
5
5
5
5
Unaffected by Reset
Unaffected by Reset
Unaffected by Reset
Unaffected by Reset
AM4
AM4
AM4
AM4
4
4
4
4
Programmer’s Model of Control Registers
AM3
AM3
AM3
AM3
3
3
3
3
MSCAN08 Controller (MSCAN08)
AM2
AM2
AM2
AM2
2
2
2
2
Advance Information
AM1
AM1
AM1
AM1
1
1
1
1
AM0
AM0
AM0
AM0
Bit 0
Bit 0
Bit 0
Bit 0
393

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