MC68HC08AZ60ACFU MOTOROLA [Motorola, Inc], MC68HC08AZ60ACFU Datasheet - Page 310

• Manufacturer Part Number: MC68HC08AZ60ACFU
• Description: Microcontrollers
• Manufacturer: MOTOROLA [Motorola, Inc]

Programmable Interrupt Timer (PIT)
Advance Information
310
Address:
POF — PIT Overflow Flag Bit
POIE — PIT Overflow Interrupt Enable Bit
PSTOP — PIT Stop Bit
Reset:
Read:
Write:
This read/write flag is set when the PIT counter reaches the modulo
value programmed in the PIT counter modulo registers. Clear POF by
reading the PIT status and control register when POF is set and then
writing a logic 0 to POF. If another PIT overflow occurs before the
clearing sequence is complete, then writing logic 0 to POF has no
effect. Therefore, a POF interrupt request cannot be lost due to
inadvertent clearing of POF. Reset clears the POF bit. Writing a logic
1 to POF has no effect.
This read/write bit enables PIT overflow interrupts when the POF bit
becomes set. Reset clears the POIE bit.
This read/write bit stops the PIT counter. Counting resumes when
PSTOP is cleared. Reset sets the PSTOP bit, stopping the PIT
counter until software clears the PSTOP bit.
1 = PIT counter has reached modulo value
0 = PIT counter has not reached modulo value
1 = PIT overflow interrupts enabled
0 = PIT overflow interrupts disabled
1 = PIT counter stopped
0 = PIT counter active
Figure 19-3. PIT Status and Control Register (PSC)
$004B
Bit 7
POF
Programmable Interrupt Timer (PIT)
0
0
= Unimplemented
POIE
6
0
PSTOP
5
1
PRST
4
0
0
3
0
0
MC68HC08AZ60A — Rev 0.0
PPS2
2
0
PPS1
1
0
MOTOROLA
PPS0
Bit 0
0