MC68HC08AZ60ACFU MOTOROLA [Motorola, Inc], MC68HC08AZ60ACFU Datasheet - Page 23
MC68HC08AZ60ACFU
Manufacturer Part Number
MC68HC08AZ60ACFU
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC08AZ60ACFU.pdf
(480 pages)
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Advance Information — MC68HC08AZ60A
MC68HC08AZ60A — Rev 0.0
MOTOROLA
Table
1-1
1-2
1-3
1-4
2-1
5-1
5-2
5-3
5-4
6-1
6-2
6-3
6-4
7-1
7-2
8-1
8-2
8-3
8-4
9-1
9-2
9-3
11-1 Break I/O Register Summary . . . . . . . . . . . . . . . . . . . . . . . . . 173
12-1 Mode Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .180
12-2 Mode Differences . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 181
12-3 READ (Read Memory) Command . . . . . . . . . . . . . . . . . . . . . 183
12-4 WRITE (Write Memory) Command. . . . . . . . . . . . . . . . . . . . . 183
12-5 IREAD (Indexed Read) Command . . . . . . . . . . . . . . . . . . . . . 184
12-6 IWRITE (Indexed Write) Command . . . . . . . . . . . . . . . . . . . . 184
External Pins Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Signal Name Conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Clock Source Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
MC Order Numbers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Vector addresses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
EEPROM-1 Array Address Blocks . . . . . . . . . . . . . . . . . . . . . . 64
Example Selective Bit Programming Description . . . . . . . . . . . 65
EEPROM-1 Program/Erase Mode Select. . . . . . . . . . . . . . . . . 70
EEPROM-1 Block Protect and Security Summary . . . . . . . . . . 72
EEPROM-2 Array Address Blocks . . . . . . . . . . . . . . . . . . . . . . 84
Example Selective Bit Programming Description . . . . . . . . . . . 85
EEPROM-2 Program/Erase Mode Select. . . . . . . . . . . . . . . . . 90
EEPROM-2 Block Protect and Security Summary . . . . . . . . . . 92
Instruction Set Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107
Opcode Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116
SIM I/O Register Summary. . . . . . . . . . . . . . . . . . . . . . . . . . . 119
Signal Naming Conventions . . . . . . . . . . . . . . . . . . . . . . . . . . 120
PIN Bit Set Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .122
SIM Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 134
I/O Register Address Summary . . . . . . . . . . . . . . . . . . . . . . . 143
Variable Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 147
VCO Frequency Multiplier (N) Selection. . . . . . . . . . . . . . . . . 158
List of Tables
Title
List of Tables
Advance Information
Page
23
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