MC68HC08AZ60ACFU MOTOROLA [Motorola, Inc], MC68HC08AZ60ACFU Datasheet - Page 263

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MC68HC08AZ60ACFU

Manufacturer Part Number
MC68HC08AZ60ACFU
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
17.6.7 Mode Fault Error
MC68HC08AZ60A — Rev 0.0
MOTOROLA
READ SPSCR
SPI RECEIVE
READ SPDR
COMPLETE
Figure 17-8. Clearing SPRF When OVRF Interrupt is Not Enabled
OVRF
SPRF
BYTE 1
1
2
3
4
5
6
7
BYTE 2 SETS SPRF BIT.
CPU READS SPSCR WITH SPRF BIT SET
AND OVRF BIT CLEAR.
BYTE 3 SETS OVRF BIT. BYTE 3 IS LOST.
BYTE 1 SETS SPRF BIT.
CPU READS SPSCR WITH SPRF BIT SET
AND OVRF BIT CLEAR.
CPU READS BYTE 1 IN SPDR,
CLEARING SPRF BIT.
CPU READS SPSCR AGAIN
TO CHECK OVRF BIT.
1
For the MODF flag to be set, the mode fault error enable bit (MODFEN)
must be set. Clearing the MODFEN bit does not clear the MODF flag but
does prevent MODF from being set again after MODF is cleared.
MODF generates a receiver/error CPU interrupt request if the error
interrupt enable bit (ERRIE) is also set. The SPRF, MODF, and OVRF
interrupts share the same CPU interrupt vector. MODF and OVRF can
generate a receiver/error CPU interrupt request. See
not possible to enable only MODF or OVRF to generate a receiver/error
CPU interrupt request. However, leaving MODFEN low prevents MODF
from being set.
2
3
Serial Peripheral Interface (SPI)
4
BYTE 2
5
BYTE 3
6
7
10
12
13
14
11
8
9
8
CPU READS SPSCR AGAIN
TO CHECK OVRF BIT.
CPU READS BYTE 2 SPDR,
CLEARING OVRF BIT.
BYTE 4 SETS SPRF BIT.
CPU READS SPSCR.
CPU READS BYTE 4 IN SPDR,
CLEARING SPRF BIT.
CPU READS SPSCR AGAIN
TO CHECK OVRF BIT.
CPU READS BYTE 2 IN SPDR,
CLEARING SPRF BIT.
9
BYTE 4
10
11
Serial Peripheral Interface (SPI)
12
Transmission Formats
Figure
Advance Information
13
14
17-9. It is
263

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