XIO2000AI TAOS [TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS], XIO2000AI Datasheet - Page 130

• Manufacturer Part Number: XIO2000AI
• Description: PCI Express to PCI Bus Translation Bridge
• Manufacturer: TAOS [TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS]

Memory-Mapped TI Proprietary Register Space
6.4
120
15:3
BIT
2
1
0
SCPS155C
Upstream Isochrony Control Register
The upstream isochrony control register allows software to control bridge isochronous behavior. See
Table 6−3 for a complete description of the register contents.
PORTARB_LEVEL_2_EN
PORTARB_LEVEL_1_EN
RESET STATE
BIT NUMBER
Device control memory window register offset:
Register type:
Default value:
ISOC_ENABLE
FIELD NAME
RSVD
Table 6−3. Upstream Isochrony Control Register Description
15
0
14
0
ACCESS
RW
RW
RW
R
13
0
Reserved. Returns 0 0000 0000 0000b when read.
Port arbitration level 2 enable. This bit is only valid if PORTARB_LEVEL_1_EN is set to
1b, because this enhances the behavior enabled through the assertion of that bit. If
PORTARB_LEVEL_1_EN is clear, then this bit is read-only and returns 0b when read.
Port arbitration level 1 enable.
Isochronous enable. Global enable bit for the upstream isochronous capability of the
bridge.
12
0
0 = Arbiter behavior follows PORTARB_LEVEL_1_EN rules (default)
1 = Aggressive mode. The arbiter deliberately stops secondary bus masters in the
0 = Arbiter behavior is controlled only by the arbiter control registers within the classic
1 = Values programmed within the port arbitration table for extended VCs impact the
0 = Mapping of upstream traffic to TCs other than TC0 prohibited (default)
1 = Mapping of upstream traffic to TCs other than TC0 permitted
middle of their transaction to assure that isochrony is preserved.
PCI configuration space (default)
arbiter’s decision to assert GNT to any particular bus master. Programmed values
in the arbiter control registers within the classic PCI configuration space have no
effect when this bit is asserted.
11
0
10
0
9
0
8
0
04h
Read-only, Read/Write
0000h
7
0
DESCRIPTION
6
0
5
0
April 2007 Revised October 2008
4
0
3
0
2
0
1
0
0
0