XIO2000AI TAOS [TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS], XIO2000AI Datasheet - Page 80

• Manufacturer Part Number: XIO2000AI
• Description: PCI Express to PCI Bus Translation Bridge
• Manufacturer: TAOS [TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS]

Classic PCI Configuration Space
4.47 Next Item Pointer Register
4.48 PCI Express Capabilities Register
70
15:14
13:9
BIT
7:4
3:0
8
SCPS155C
The contents of this read-only register indicate the next item in the linked list of capabilities for the bridge. This
register reads 00h indicating no additional capabilities are supported.
This read-only register indicates the capabilities of the bridge related to PCI Express. See Table 4−24 for a
complete description of the register contents.
RESET STATE
RESET STATE
BIT NUMBER
BIT NUMBER
FIELD NAME
DEV_TYPE
PCI register offset:
Register type:
Default value:
PCI register offset:
Register type:
Default value:
VERSION
INT_NUM
RSVD
SLOT
ACCESS
15
Table 4−24. PCI Express Capabilities Register Description
0
7
0
R
R
R
R
R
14
0
6
0
Reserved. Returns 00b when read.
Interrupt message number. This field is used for MSI support and is implemented as read-only
00000b in the bridge.
Slot implemented. This bit is not valid for the bridge and is read-only 0b.
Device/port type. This read-only field returns 7h indicating that the device is a PCI Express-to-PCI
bridge.
Capability version. This field returns 1h indicating revision 1 of the PCI Express capability.
13
0
5
0
91h
Read-only
00h
92h
Read-only
0071h
12
0
4
0
11
0
3
0
10
0
2
0
9
0
1
0
8
0
DESCRIPTION
0
0
7
0
6
1
5
1
April 2007 Revised October 2008
4
1
3
0
2
0
1
0
0
1