XIO2000AI TAOS [TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS], XIO2000AI Datasheet - Page 148

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XIO2000AI

Manufacturer Part Number
XIO2000AI
Description
PCI Express to PCI Bus Translation Bridge
Manufacturer
TAOS [TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS]
Datasheet

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Electrical Characteristics
138
SCPS155C
13. A T RX-EYE = 0.40 UI provides for a total sum of 0.60 UI deterministic and random jitter budget for the transmitter and interconnect
14. The receiver input impedance results in a differential return loss greater than or equal to 15 dB with the P line biased to 300 mV and
15. Impedance during all link training status state machine (LTSSM) states. When transitioning from a PCI Express reset to the detect
16. The RX dc common mode impedance that exists when no power is present or PCI Express reset is asserted. This helps ensure that
collected any 250 consecutive UIs. The T RX-EYE-MEDIAN-to-MAX-JITTER specification ensures a jitter distribution in which the median
and the maximum deviation from the median is less than half of the total UI jitter budget collected over any 250 consecutive TX UIs.
It must be noted that the median is not the same as the mean. The jitter median describes the point in time where the number of
jitter points on either side is approximately equal as opposed to the averaged time value. If the clocks to the RX and TX are not derived
from the same reference clock, then the TX UI recovered from 3500 consecutive UIs must be used as the reference for the eye
diagram.
the N line biased to −300 mV and a common mode return loss greater than or equal to 6 dB (no bias required) over a frequency range
of 50 MHz to 1.25 GHz. This input impedance requirement applies to all valid input levels. The reference impedance for return loss
measurements for is 50 Ω to ground for both the P and N line (i.e., as measured by a Vector Network Analyzer with 50-Ω probes).
The series capacitors C TX is optional for the return loss measurement.
state (the initial state of the LTSSM) there is a 5-ms transition time before receiver termination values must be met on the
unconfigured lane of a port.
the receiver detect circuit does not falsely assume a receiver is powered on when it is not. This term must be measured at 300 mV
above the RX ground.
April 2007 Revised October 2008

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