XIO2000AI TAOS [TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS], XIO2000AI Datasheet - Page 28

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XIO2000AI

Manufacturer Part Number
XIO2000AI
Description
PCI Express to PCI Bus Translation Bridge
Manufacturer
TAOS [TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS]
Datasheet

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Introduction
18
PERST
REF0_PCIE
REF1_PCIE
RXP
RXN
TXP
TXN
WAKE
SIGNAL
SCPS155C
BALL #
GZZ/
ZZZ
H17
H16
M16
L16
L17
E17
E16
J17
BALL #
ZHC
G14
G13
H14
K14
E13
E14
J13
L14
BALL #
ZHH
H12
E14
E13
G14
G13
K14
J14
J13
Table 2−8. PCI Express Terminals
TYPE
DO
I/O
I/O
DI
O
I
DIFF IN
CMOS
CMOS
CELL
TYPE
BIAS
DIFF
OUT
HS
HS
LV
LV
V DD_33_
V DD_33_
COMBIO
COMBIO
V DD_15
CLAMP
RAIL
V SS
EXTERNAL
capacitors
External
PARTS
resistor
Series
PCI Express reset input. The PERST
signal identifies when the system power is
stable and generates an internal power on
reset.
Note: The PERST input buffer has
hysteresis.
External reference resistor + and −
terminals for setting TX driver current. An
external resistor is connected between
terminals L16 and L17.
High-speed receive pair. RXP and RXN
comprise the differential receive pair for the
single PCI Express lane supported.
High-speed transmit pair. TXP and TXN
comprise the differential transmit pair for
the single PCI Express lane supported.
Wake is an active low signal that is driven
low to reactivate the PCI Express link
hierarchy’s main power rails and reference
clocks.
Note: Since WAKE is an open-drain output
buffer, a system side pullup resistor is
required.
April 2007 Revised October 2008
DESCRIPTION

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