XIO2000AI TAOS [TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS], XIO2000AI Datasheet - Page 137

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XIO2000AI

Manufacturer Part Number
XIO2000AI
Description
PCI Express to PCI Bus Translation Bridge
Manufacturer
TAOS [TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS]
Datasheet

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6.20 Serial-Bus Word Address Register
6.21 Serial-Bus Slave Address Register
† These bits are reset by a PCI Express reset (PERST), a GRST, or the internally-generated power-on reset.
April 2007 Revised October 2008
7:1†
BIT
0†
The value written to the serial-bus word address register represents the word address of the byte being read
from or written to on the serial-bus interface. The word address is loaded into this register prior to writing the
serial-bus slave address register that initiates the bus cycle. This register is an alias for the serial-bus word
address register in the PCI header (offset B1h, see Section 4.56). This register is reset by a PCI Express reset
(PERST), a GRST, or the internally-generated power-on reset.
The serial-bus slave address register indicates the address of the device being targeted by the serial-bus
cycle. This register also indicates if the cycle will be a read or a write cycle. Writing to this register initiates the
cycle on the serial interface. This register is an alias for the serial-bus slave address register in the PCI header
(offset B2h, see Section 4.57). See Table 6−10 for a complete description of the register contents.
RESET STATE
RESET STATE
BIT NUMBER
BIT NUMBER
SLAVE_ADDR
FIELD NAME
Device control memory window register offset:
Register type:
Default value:
Device control memory window register offset:
Register type:
Default value:
RW_CMD
Table 6−10. Serial-Bus Slave Address Register Description
ACCESS
7
0
7
0
RW
RW
6
0
6
0
Serial-bus slave address. This 7-bit field is the slave address for a serial-bus read or write
transaction. The default value for this field is 000 0000b.
Read/write command. This bit determines if the serial-bus cycle is a read or a write cycle.
5
0
5
0
0 = A single byte write is requested (default)
1 = A single byte read is requested
4
0
4
0
3
0
3
0
2
0
2
0
1
0
1
0
45h
Read/Write
00h
46h
Read/Write
00h
0
0
0
0
DESCRIPTION
Memory-Mapped TI Proprietary Register Space
SCPS155C
127

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