XIO2000AI TAOS [TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS], XIO2000AI Datasheet - Page 35

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XIO2000AI

Manufacturer Part Number
XIO2000AI
Description
PCI Express to PCI Bus Translation Bridge
Manufacturer
TAOS [TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS]
Datasheet

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3.1.2 Power-Down Sequence
April 2007 Revised October 2008
REFCLK
V DD_33 and
V DDA_33
V DD_15 and
V DDA_15
PERST
V CCP
See the power-up sequencing diagram in Figure 3−2.
1. Assert PERST to the device.
2. Remove the reference clock.
3. Remove V
4. Remove 3.3-V and 1.5-V voltages.
Please see the power-down sequencing diagram in Figure 3−3. If the V
powered after a system shutdown, then the bridge power-down sequence is exactly the same as shown in
Figure 3−3.
CCP
clamp voltage.
Figure 3−2. Power-Up Sequence
100 ms
100 µs
DD_33_AUX
Feature/Protocol Descriptions
terminal is to remain
SCPS155C
25

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