XC68HC08KH12 Motorola, XC68HC08KH12 Datasheet - Page 105

• Manufacturer Part Number: XC68HC08KH12
• Description: MICROCONTROLLER
• Manufacturer: Motorola

8.6.3 PLL Multiplier Select Registers (PMSH:PMSL)
MC68HC(7)08KH12
MOTOROLA
—
Rev. 1.0
Address:
Address:
ACQ — Acquisition Mode Bit
The PLL multiplier select registers contain the programming information
for the modulo feedback divider.
Reset:
Reset:
Read:
Read:
Write:
Write:
logic zero and has no meaning. The write one function of this bit is
reserved for test, so this bit must always be written a zero. Reset
clears the LOCK bit.
When the AUTO bit is set, ACQ is a read-only bit that indicates
whether the PLL is in acquisition mode or tracking mode. When the
AUTO bit is clear, ACQ is a read/write bit that controls whether the
PLL is in acquisition or tracking mode.
In automatic bandwidth control mode (AUTO = 1), the last-written
value from manual operation is stored in a temporary location and is
recovered when manual operation resumes. Reset clears this bit,
enabling acquisition mode.
Figure 8-5. PLL Multiplier Select Registers (PMSH:PMSL)
1 = VCO frequency correct or locked
0 = VCO frequency incorrect or unlocked
1 = Tracking mode
0 = Acquisition mode
$003C
$003D
MUL7
Bit 7
0
0
0
Clock Generator Module (CGM)
PMSH
PMSL
MUL6
= Unimplemented
6
0
0
0
MUL5
5
0
0
0
MUL4
4
0
0
0
MUL11
MUL3
3
0
0
Clock Generator Module (CGM)
MUL10
MUL2
2
0
0
Advance Information
MUL9
MUL1
CGM Registers
1
0
1
MUL8
MUL0
Bit 0
0
0
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