XC68HC08KH12 Motorola, XC68HC08KH12 Datasheet - Page 39

• Manufacturer Part Number: XC68HC08KH12
• Description: MICROCONTROLLER
• Manufacturer: Motorola

MC68HC(7)08KH12
MOTOROLA
Addr.
$003A
$003B
$003C
$003D
$003E
$003F
$0030
$0031
$0032
$0033
$0034
$0035
$0036
$0037
$0038
$0039
PLL Multiplier Select Register High
PLL Multiplier Select Register Low
PLL Bandwidth Control Register
PLL Reference Divider Select
USB HUB Endpoint 0 Data
USB HUB Endpoint 0 Data
USB HUB Endpoint 0 Data
USB HUB Endpoint 0 Data
USB HUB Endpoint 0 Data
USB HUB Endpoint 0 Data
USB HUB Endpoint 0 Data
USB HUB Endpoint 0 Data
Figure 2-2. Control, Status, and Data Registers (Continued)
Name
PLL Control Register
—
Register 0 (HE0D0)
Register 1 (HE0D1)
Register 2 (HE0D2)
Register 3 (HE0D3)
Register 4 (HE0D4)
Register 5 (HE0D5)
Register 6 (HE0D6)
Register 7 (HE0D7)
Rev. 1.0
Register (PRDS)
Unimplemented
Unimplemented
Unimplemented
(PBWC)
(PMSH)
(PMSL)
(PCTL)
W: HE0T07 HE0T06 HE0T05 HE0T04 HE0T03 HE0T02 HE0T01 HE0T00
W: HE0T17 HE0T16 HE0T15 HE0T14 HE0T13 HE0T12 HE0T11 HE0T10
W: HE0T27 HE0T26 HE0T25 HE0T24 HE0T23 HE0T22 HE0T21 HE0T20
W: HE0T37 HE0T36 HE0T35 HE0T34 HE0T33 HE0T32 HE0T31 HE0T30
W: HE0T47 HE0T46 HE0T45 HE0T44 HE0T43 HE0T42 HE0T41 HE0T40
W: HE0T57 HE0T56 HE0T55 HE0T54 HE0T53 HE0T52 HE0T51 HE0T50
W: HE0T67 HE0T66 HE0T65 HE0T64 HE0T63 HE0T62 HE0T61 HE0T60
W: HE0T77 HE0T76 HE0T75 HE0T74 HE0T73 HE0T72 HE0T71 HE0T70
W:
W:
W:
W:
W:
W:
W:
W:
R: HE0R07 HE0R06 HE0R05 HE0R04 HE0R03 HE0R02 HE0R01 HE0R00
R: HE0R17 HE0R16 HE0R15 HE0R14 HE0R13 HE0R12 HE0R11 HE0R10
R: HE0R27 HE0R26 HE0R25 HE0R24 HE0R23 HE0R22 HE0R21 HE0R20
R: HE0R37 HE0R36 HE0R35 HE0R34 HE0R33 HE0R32 HE0R31 HE0R30
R: HE0R47 HE0R46 HE0R45 HE0R44 HE0R43 HE0R42 HE0R41 HE0R40
R: HE0R57 HE0R56 HE0R55 HE0R54 HE0R53 HE0R52 HE0R51 HE0R50
R: HE0R67 HE0R66 HE0R65 HE0R64 HE0R63 HE0R62 HE0R61 HE0R60
R: HE0R77 HE0R76 HE0R75 HE0R74 HE0R73 HE0R72 HE0R71 HE0R70
R:
R:
R:
R:
R:
R:
R:
R:
Bit 7
PLLIE
AUTO
MUL7
Memory Map
= Unimplemented
LOCK
MUL6
PLLF
6
PLLON
MUL5
ACQ
5
MUL4
BCS
4
0
MUL11
PRE1
MUL3
RDS3
3
R
0
= Reserved
MUL10
PRE0
MUL2
RDS2
2
0
Advance Information
MUL9
MUL1
RDS1
1
0
0
Memory Map
I/O Section
Bit 0
MUL8
MUL0
RDS0
0
0
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