XC68HC08KH12 Motorola, XC68HC08KH12 Datasheet - Page 83

• Manufacturer Part Number: XC68HC08KH12
• Description: MICROCONTROLLER
• Manufacturer: Motorola

7.8 SIM Registers
7.8.1 Break Status Register (BSR)
MC68HC(7)08KH12
MOTOROLA
—
Rev. 1.0
Address:
The SIM has three memory mapped registers.
mapping of these registers.
The break status register contains a flag to indicate that a break caused
an exit from stop or wait mode.
SBSW can be read within the break state SWI routine. The user can
modify the return address on the stack by subtracting one from it. The
following code is an example of this. Writing zero to the SBSW bit clears
it.
Reset:
Read:
Write:
Address
SBSW — SIM Break Stop/Wait
$FE00
$FE01
$FE03
$FE00
Bit 7
This status bit is useful in applications requiring a return to wait
or stop mode after exiting from a break interrupt. Clear SBSW
by writing a logic zero to it. Reset clears SBSW.
R
R
System Integration Module (SIM)
1 = Stop mode or wait mode was exited by break interrupt
0 = Stop mode or wait mode was not exited by break
Figure 7-20. Break Status Register (BSR)
interrupt
R
6
= Reserved
Table 7-4. SIM Registers
R
5
Register
BFCR
RSR
BSR
R
4
R
3
1. Writing a logic zero clears SBSW
System Integration Module (SIM)
Table 7-4
Access Mode
R
2
Advance Information
User
User
User
SBSW
Note 1
shows the
1
0
SIM Registers
Bit 0
R
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