XC68HC08KH12 Motorola, XC68HC08KH12 Datasheet - Page 242

• Manufacturer Part Number: XC68HC08KH12
• Description: MICROCONTROLLER
• Manufacturer: Motorola

Break Module (BREAK)
16.3 Features
16.4 Functional Description
Advance Information
242
Features of the break module include the following:
When the internal address bus matches the value written in the break
address registers, the break module issues a breakpoint signal (BKPT)
to the SIM. The SIM then causes the CPU to load the instruction register
with a software interrupt instruction (SWI) after completion of the current
CPU instruction. The program counter vectors to $FFFC and $FFFD
($FEFC and $FEFD in monitor mode).
The following events can cause a break interrupt to occur:
When a CPU generated address matches the contents of the break
address registers, the break interrupt begins after the CPU completes its
current instruction. A return from interrupt instruction (RTI) in the break
routine ends the break interrupt and returns the MCU to normal
operation.
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Accessible I/O Registers during the Break Interrupt
CPU-Generated Break Interrupts
Software-Generated Break Interrupts
COP Disabling during Break Interrupts
A CPU-generated address (the address in the program counter)
matches the contents of the break address registers.
Software writes a logic one to the BRKA bit in the break status and
control register.
Figure 16-1
Break Module (BREAK)
shows the structure of the break module.
MC68HC(7)08KH12
MOTOROLA
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Rev. 1.0