XC68HC08KH12 Motorola, XC68HC08KH12 Datasheet - Page 141

• Manufacturer Part Number: XC68HC08KH12
• Description: MICROCONTROLLER
• Manufacturer: Motorola

9.5.4 USB Embedded Device Control Register 0 (DCR0)
MC68HC(7)08KH12
MOTOROLA
—
Rev. 1.0
Address:
TXD1IE — Embedded Device Endpoint 1/2 Transmit Interrupt Enable
TXD1FR — Embedded Device Endpoint 1/2 Transmit Flag Reset
T0SEQ — Embedded Device Endpoint 0 Transmit Sequence Bit
Reset:
Figure 9-15. USB Embedded Device Control Register 0 (DCR0)
Read:
Write:
This read/write bit enables the USB to generate CPU interrupt
requests when the shared Transmit Endpoint 1/2 interrupt flag bit of
the embedded device (TXD1F) becomes set. Reset clears the
TXD1IE bit.
Writing a logic 1 to this write only bit will clear the TXD1F bit if it is set.
Writing a logic 0 to TXD1FR has no effect. Reset clears this bit.
This read/write bit determines which type of data packet (DATA0 or
DATA1) will be sent during the next IN transaction directed at
Endpoint 0. Toggling of this bit must be controlled by software. Reset
clears this bit.
1 = Transmit on Endpoint 1 or Endpoint 2 of the embedded device
0 = Transmit on Endpoint 1 or Endpoint 2 of the embedded device
1 = Transmit embedded device Endpoints 1 and 2 can generate a
0 = Transmit embedded device Endpoints 1 and 2 cannot generate
T0SEQ
$004B
Bit 7
Universal Serial Bus Module (USB)
has occurred
has not occurred
CPU interrupt request
a CPU interrupt request
0
DSTALL0
6
0
I/O Register Description of the Embedded Device Function
TX0E
5
0
RX0E
4
0
TP0SIZ3
Universal Serial Bus Module (USB)
3
0
TP0SIZ2
2
0
Advance Information
TP0SIZ1
1
0
TP0SIZ0
Bit 0
0
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