XC68HC08KH12 Motorola, XC68HC08KH12 Datasheet - Page 65

• Manufacturer Part Number: XC68HC08KH12
• Description: MICROCONTROLLER
• Manufacturer: Motorola

7.3 SIM Bus Clock Control and Generation
7.3.1 Bus Timing
MC68HC(7)08KH12
MOTOROLA
—
Rev. 1.0
Table 7-1
The bus clock generator provides system clock signals for the CPU and
peripherals on the MCU. The system clocks are generated from an
incoming clock, CGMOUT, as shown in
In user mode, the internal bus frequency is the oscillator frequency
(CGMXCLK) divided by four.
Signal Name
CGMXCLK
CGMOUT
PORRST
IRST
R/W
IDB
IAB
System Integration Module (SIM)
shows the internal signal names used in this section.
PLL/OSCILLATOR
PLL/OSCILLATOR
Table 7-1. Signal Name Conventions
From
From
Buffered OSC1 from the oscillator
The CGMXCLK frequency divided by two. This signal is again
divided by two in the SIM to generate the internal bus clocks
(Bus clock = CGMXCLK divided by four)
Internal address bus
Internal data bus
Signal from the power-on reset module to the SIM
Internal reset signal
Read/write signal
Figure 7-3. SIM Clock Signals
CGMXCLK
CGMOUT
SIM Bus Clock Control and Generation
Description
SIM COUNTER
Figure
2
SIM
System Integration Module (SIM)
GENERATORS
7-3.
BUS CLOCK
Advance Information
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