XC68HC08KH12 Motorola, XC68HC08KH12 Datasheet - Page 77
XC68HC08KH12
Manufacturer Part Number
XC68HC08KH12
Description
MICROCONTROLLER
Manufacturer
Motorola
Datasheet
1.XC68HC08KH12.pdf
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7.6.2.1 Interrupt Status Register 1
MC68HC(7)08KH12
MOTOROLA
Port-D Keyboard Pin Interrupt
Port-F Keyboard Pin Interrupt
Phase-locked Loop Interrupt
(1) The I bit in the condition code register is a global mask for all interrupts sources except the SWI instruction.
(2) 0= highest priority
Source
—
Rev. 1.0
Address:
I
Bit 0 and Bit 1 — Always read 0
F
Reset:
Read:
Write:
6–I
These flags indicate the presence of interrupt requests from the
sources shown in
F
1 = Interrupt request present
0 = No interrupt request present
1 — Interrupt Flags 1–6
$FE04
Bit 7
Table 7-3. Interrupt Sources
IF6
R
R
0
System Integration Module (SIM)
Figure 7-12. Interrupt Status Register 1 (INT1)
KEYDF
KEYFF
PLLF
Flag
IF5
R
6
0
= Reserved
Table
IMASKD
IMASKF
Mask
IF4
R
PLLIE
5
0
7-3.
(1)
IF3
R
4
0
Register
Flag
IF10
IF11
INT
IF9
IF2
R
3
0
System Integration Module (SIM)
Priority
10
11
9
IF1
R
2
0
(2)
Advance Information
Vector Address
Exception Control
$FFEA–$FFEB
$FFE8–$FFE9
$FFE6–$FFE7
R
1
0
0
Bit 0
R
0
0
77
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