XC68HC08KH12 Motorola, XC68HC08KH12 Datasheet - Page 187

• Manufacturer Part Number: XC68HC08KH12
• Description: MICROCONTROLLER
• Manufacturer: Motorola

MC68HC(7)08KH12
MOTOROLA
NOTE:
—
Rev. 1.0
Address:
DDRA[7:0] — Data Direction Register A Bits
Avoid glitches on port A pins by writing to the port A data register before
changing data direction register A bits from 0 to 1.
Figure 12-3
When bit DDRAx is a logic one, reading address $0000 reads the PTAx
data latch. When bit DDRAx is a logic zero, reading address $0000
reads the voltage level on the pin. The data latch can always be written,
regardless of the state of its data direction bit.
the operation of the port A pins.
Reset:
Read:
Write:
These read/write bits control port A data direction. Reset clears
DDRA[7:0], configuring all port A pins as inputs.
1 = Corresponding port A pin configured as output
0 = Corresponding port A pin configured as input
DDRA7
READ DDRA ($0004)
WRITE DDRA ($0004)
WRITE PTA ($0000)
READ PTA ($0000)
$0004
Bit 7
0
Figure 12-2. Data Direction Register A (DDRA)
shows the port A I/O logic.
DDRA6
6
0
Figure 12-3. Port A I/O Circuit
I/O Ports
RESET
DDRA5
5
0
DDRA4
DDRAx
4
0
PTAx
DDRA3
3
0
Table 12-2
DDRA2
2
0
Advance Information
DDRA1
summarizes
1
0
I/O Ports
DDRA0
Bit 0
Port A
0
PTAx
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