KFM2G16Q2M-DEB5 SAMSUNG [Samsung semiconductor], KFM2G16Q2M-DEB5 Datasheet - Page 118

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KFM2G16Q2M-DEB5

Manufacturer Part Number
KFM2G16Q2M-DEB5
Description
MuxOneNAND FLASH MEMORY
Manufacturer
SAMSUNG [Samsung semiconductor]
Datasheet
MuxOneNAND1G(KFM1G16Q2M-DEB5)
MuxOneNAND2G(KFN2G16Q2M-DEB5)
This can be configured in either a synchronous mode or an asynchronous mode.
Synchronous Mode Using the INT Pin
When operating synchronously, INT is tied directly to a Host GPIO.
Asynchronous Mode Using the INT Pin
When configured to operate in an asynchronous mode, /CE and /AVD of the MuxOneNAND are tied to /CE of the Host. CLK is tied to
the Host Vss (Ground). /RDY is tied to a no-connect. /OE of the MuxOneNAND and Host are tied together and INT is tied to a GPIO.
An alternate method of determining the end of an operation is to continuously monitor the Interrupt Status Register Bit instead of
using the INT pin.
7.1.2
Polling the Interrupt Register Status Bit
Command
INT
Host
Host
GPIO
GPIO
RDY
AVD
CLK
N.C
Vss
CE
OE
CE
OE
118
MuxOneNAND
MuxOneNAND
CE
AVD
CLK
RDY
OE
INT
CE
AVD
CLK
RDY
OE
INT
FLASH MEMORY

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