KFM2G16Q2M-DEB5 SAMSUNG [Samsung semiconductor], KFM2G16Q2M-DEB5 Datasheet - Page 86

• Manufacturer Part Number: KFM2G16Q2M-DEB5
• Description: MuxOneNAND FLASH MEMORY
• Manufacturer: SAMSUNG [Samsung semiconductor]

MuxOneNAND1G(KFM1G16Q2M-DEB5)
MuxOneNAND2G(KFN2G16Q2M-DEB5)
3.11.1 OTP Load Operation
An OTP Load Operation accesses the OTP area and transfers identified content from the OTP to the DataRAM on-chip buffer,
thus making the OTP contents available to the Host.
The OTP area is a separate part of the NAND Flash Array memory. It is accessed by issuing OTP Access command(65h) instead of
a Flash Block Address (FBA) command.
After being accessed with the OTP Access Command, the contents of OTP memory area are loaded using the same operations
as a normal load operation to the NAND Flash Array memory (see section 3.6 for more information).
To exit the OTP access mode following an OTP Load Operation, a Cold-, Warm-, Hot-, or NAND Flash Core Reset operation is per-
formed.
OTP Read Operation Flow Chart
Write ’OTP Access’ Command
Write ’BSA, BSC’ of DataRAM
Write ’DFS*, FBA’ of Flash
Add: F100h DQ=DFS*’, FBA
Write 0 to interrupt register
Add: F200h DQ=BSA, BSC
Add: F107h DQ=FPA, FSA
Write ’FPA, FSA’ of Flash
Select DataRAM for DDP
Note 1) FBA(NAND Flash Block Address) could be any address.
Add: F241h DQ[15]=INT
Add: F241h DQ=0000h
Add: F220h DQ=0065h
Add: F101h DQ=DBS*
low to high transition
Wait for INT register
Start
* DFS is for DDP
1)
86
Write 0 to interrupt register
/NAND Flash Core Reset
OTP Reading completed
Add: F241h DQ[15]=INT
Write ’Load’ Command
Add: F241h DQ=0000h
low to high transition
Host reads data from
Wait for INT register
DQ=0000h or 0013h
Do Cold/Warm/Hot
Add: F220h
DataRAM
OTP Exit
FLASH MEMORY